Arithmetic algorithms for extended precision using floating-point expansions

Abstract : Many numerical problems require a higher computing precision than the one offered by standard floating-point (FP) formats. One common way of extending the precision is to represent numbers in a multiple component format. By using the so-called floating-point expansions, real numbers are represented as the unevaluated sum of standard machine precision FP numbers. This representation offers the simplicity of using directly available, hardware implemented and highly optimized FP operations and is used by multiple-precision libraries such as Bailey's QD or the analogue Graphics Processing Units (GPU) tuned version, GQD. In this article we revisit algorithms for adding and multiplying FP expansions, then we introduce and prove new algorithms for normalizing, dividing and square rooting of FP expansions. The new method used for computing the reciprocal and the square root of a FP expansion is based on an adapted Newton-Raphson iteration where the intermediate calculations are done using "truncated" operations (additions, multiplications) involving FP expansions. We give here a thorough error analysis showing that it allows very accurate computations. More precisely, after q iterations, the computed FP expansion x=x_0+\ldots+x_{2^q-1} satisfies, for the reciprocal algorithm, the relative error bound: |(x-1/a)*a| <= 2^{-2^q(p-3)-1} and, respectively, for the square root one: |x-1/sqrt(a)| <= 2^{-2^q(p-3)-1}/sqrt(a), where p>2 is the precision of the FP representation used (p=24 for single precision and p=53 for double precision).
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IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2016, 65 (4), pp.1197 - 1210. <10.1109/TC.2015.2441714>
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Contributeur : Valentina Popescu <>
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Dernière modification le : vendredi 17 février 2017 - 16:15:11
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Mioara Joldes, Olivier Marty, Jean-Michel Muller, Valentina Popescu. Arithmetic algorithms for extended precision using floating-point expansions. IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2016, 65 (4), pp.1197 - 1210. <10.1109/TC.2015.2441714>. <hal-01111551v2>

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