L. Benini, E. Flamand, D. Fuin, and D. Melpignano, P2012: Building an ecosystem for a scalable, modular and high-efficiency embedded computing accelerator, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp.983-987, 2012.
DOI : 10.1109/DATE.2012.6176639

P. Helle, H. Lakshman, M. Siekmann, J. Stegemann, T. Hinz et al., A Scalable Video Coding Extension of HEVC, 2013 Data Compression Conference, pp.201-210, 2013.
DOI : 10.1109/DCC.2013.28

P. Marwedel, J. Teich, G. Kouveli, I. Bacivarov, L. Thiele et al., Mapping of applications to MPSoCs, Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, CODES+ISSS '11, pp.109-118, 2011.
DOI : 10.1145/2039370.2039390

E. Lee and S. Ha, Scheduling strategies for multiprocessor real-time DSP, IEEE Global Telecommunications Conference, 1989, and Exhibition. 'Communications Technology for the 1990s and Beyond, pp.1279-1283, 1989.
DOI : 10.1109/GLOCOM.1989.64160

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.73.7946

S. S. Bhattacharyya, E. Deprettere, R. Leupers, and J. Takala, Online, Handbook of Signal Processing Systems, pp.978-979, 2013.

K. Desnos, M. Pelcat, J. Nezan, S. S. Bhattacharyya, and S. Aridhi, PiMM: Parameterized and Interfaced dataflow Meta-Model for MPSoCs runtime reconfiguration, 2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), pp.41-48, 2013.
DOI : 10.1109/SAMOS.2013.6621104

URL : https://hal.archives-ouvertes.fr/hal-00877492

J. Heulot, M. Pelcat, K. Desnos, J. F. Nezan, and S. Aridhi, Spider: A Synchronous Parameterized and Interfaced Dataflow-based RTOS for multicore DSPS, 2014 6th European Embedded Design in Education and Research Conference (EDERC), 2014.
DOI : 10.1109/EDERC.2014.6924381

URL : https://hal.archives-ouvertes.fr/hal-01067052

L. Dagum and R. Menon, OpenMP: an industry standard API for shared-memory programming, IEEE Computational Science and Engineering, vol.5, issue.1, pp.46-55, 1998.
DOI : 10.1109/99.660313

J. E. Stone, D. Gohara, and G. Shi, OpenCL: A Parallel Programming Standard for Heterogeneous Computing Systems, Computing in Science & Engineering, vol.12, issue.3, p.66, 2010.
DOI : 10.1109/MCSE.2010.69

URL : http://www.ncbi.nlm.nih.gov/pmc/articles/PMC2964860

C. Lucarz, M. Mattavelli, M. Wipliez, G. Roquier, M. Raulet et al., Dataflow/actor-oriented language for the design of complex signal processing systems, Conference on Design and Architectures for Signal and Image Processing (DASIP 2008) Proceedings, pp.1-8, 2008.
URL : https://hal.archives-ouvertes.fr/hal-00336520

M. Pelcat, J. Nezan, and S. Aridhi, Adaptive multicore scheduling for the LTE uplink, 2010 NASA/ESA Conference on Adaptive Hardware and Systems, pp.36-43, 2010.
DOI : 10.1109/AHS.2010.5546233

URL : https://hal.archives-ouvertes.fr/hal-00488576

C. Hsu, J. L. Pino, and F. Hu, A mixed-mode vector-based dataflow approach for modeling and simulating LTE physical layer, Proceedings of the 47th Design Automation Conference on, DAC '10, pp.47-65, 2010.
DOI : 10.1145/1837274.1837282

M. Sen, I. Corretjer, F. Haim, S. Saha, J. Schlessman et al., Dataflow-based mapping of computer vision algorithms onto fpgas, EURASIP Journal on Embedded Systems, vol.2007, issue.1, pp.29-29, 2007.

E. A. Lee and D. G. Messerschmitt, Synchronous data flow, Proceedings of the IEEE, pp.1235-1245, 1987.
DOI : 10.1109/PROC.1987.13876

S. Neuendorffer and E. Lee, Hierarchical reconfiguration of dataflow models, " in Formal Methods and Models for Co-Design, MEM- OCODE'04. Proceedings. Second ACM and IEEE International Conference on, p.179188, 2004.

A. K. Singh, M. Shafique, A. Kumar, and J. Henkel, Mapping on multi/many-core systems, Proceedings of the 50th Annual Design Automation Conference on, DAC '13, p.1, 2013.
DOI : 10.1145/2463209.2488734

G. F. Zaki, W. Plishker, S. S. Bhattacharyya, C. Clancy, and J. Kuykendall, Integration of Dataflow-Based Heterogeneous Multiprocessor Scheduling Techniques in GNU Radio, 21] S. Sriram and S. S. Bhattacharyya, Embedded multiprocessors: Scheduling and synchronization, pp.177-191, 2012.
DOI : 10.1007/s11265-012-0696-0

Y. Kwok, High-performance algorithms for compile-time scheduling of parallel processors, 1997.

E. Lee and D. G. Messerschmitt, Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing, IEEE Transactions on Computers, vol.36, issue.1, pp.24-35, 1987.
DOI : 10.1109/TC.1987.5009446

J. Boutellier, S. S. Bhattacharyya, and O. Silvén, A Low-overhead Scheduling Methodology for Fine-grained Acceleration of Signal Processing Systems, Journal of Signal Processing Systems, vol.II, issue.7, pp.333-343, 2010.
DOI : 10.1007/s11265-009-0366-z