SchedulingTable : scheduling table 1: for i := 1 to length(Path) do 2: ShiftSize := (i ? 1) * SegmentBufferSize, ShiftSize) 4: ShiftedIntervalList[i] := ShiftLeftIntervals(FreeIntervalList, p.=IntersectIntervals ,
Language and Compiler Design for Streaming Applications, International Journal of Parallel Programming, vol.19, issue.2, 2005. ,
DOI : 10.1007/s10766-005-3590-6
Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor, Proceedings ALCHEMY 2013, 2013. ,
DOI : 10.1016/j.procs.2013.05.330
URL : https://hal.archives-ouvertes.fr/hal-00832504
Methods and tools for mapping process networks onto multi-processor systems-on-chip, Handbook of Signal Processing Systems, 2013. ,
Parallel FFT algorithms on network-on-chips, Proceedings ITNG 2008, 2008. ,
A framework to schedule parametric dataflow applications on many-core platforms, Proceedings CPC'13, 2013. ,
URL : https://hal.archives-ouvertes.fr/hal-00923670
Implementation of guaranteed services in the MANGO clockless network-on-chip, IEE Proceedings - Computers and Digital Techniques, vol.153, issue.4, 2006. ,
DOI : 10.1049/ip-cdt:20050067
Thousand core chips ? a technology perspective, Proceedings DAC, 2007. ,
Router architecture for highperformance nocs, Proceedings SBCCI, 2007. ,
Throughput Optimization by Software Pipelining of Conditional Reservation tables INRIA, Rapport de recherche RR-7606, ACM TACO. [Online]. Available, 2011. ,
From dataflow specification to multiprocessor partitioned time-triggered realtime implementation, 2012. ,
URL : https://hal.archives-ouvertes.fr/hal-00742908
A survey of hard real-time scheduling for multiprocessor systems, ACM Computing Surveys, vol.43, issue.4, 2011. ,
DOI : 10.1145/1978802.1978814
Programmable routers for efficient mapping of applications onto NoC-based MPSoCs, Proceedings DASIP, 2012. ,
URL : https://hal.archives-ouvertes.fr/hal-00787497
Scheduling with bus access optimization for distributed embedded systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.8, issue.5, pp.472-491, 2000. ,
DOI : 10.1109/92.894152
Static scheduling of pipelined periodic tasks in distributed real-time systems, Proceedings Ninth Euromicro Workshop on Real Time Systems, pp.128-135, 1995. ,
DOI : 10.1109/EMWRTS.1997.613773
Space optimal solution for data reordering in streaming applications on NoC based MPSoC, Journal of Systems Architecture, vol.59, issue.7, 2013. ,
DOI : 10.1016/j.sysarc.2013.04.001
URL : https://hal.archives-ouvertes.fr/hal-01195936
Time analysable synchronisation techniques for parallelised hard real-time applications, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012. ,
DOI : 10.1109/DATE.2012.6176555
Priority-driven scheduling of periodic task systems on multiprocessors, Real-Time Systems, vol.25, issue.2-3, 2003. ,
AEthereal network on chip: Concepts, architectures, and implementations, IEEE Design & Test of Computers, vol.22, issue.5, 2005. ,
From algorithm and architecture specifications to automatic generation of distributed real-time executives: a seamless flow of graphs transformations, First ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2003. MEMOCODE '03. Proceedings., 2003. ,
DOI : 10.1109/MEMCOD.2003.1210097
Wcet analysis of multi-level non-inclusive setassociative instruction caches, RTSS, 2008. ,
Network on chip with quality of service United States patent application publication US, 2011. ,
The Art of Multiprocessor Programmin, 2008. ,
ORTAP: An Offset-based response time analysis for a pipelined communication resource model, 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS), 2013. ,
DOI : 10.1109/RTAS.2013.6531097
Scheduling algorithms for multiprogramming in a hard real-time environment, Journal of the ACM, vol.20, issue.1, 1973. ,
Tdm virtual-circuit configuration for networkon-chip, IEEE Trans. VLSI, 2007. ,
DOI : 10.1109/tvlsi.2008.2000673
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.141.7401
Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip, Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004. ,
DOI : 10.1109/DATE.2004.1269001
A case for bufferless routing in on-chip networks, Proceedings ISCA-36, 2009. ,
A survey of wormhole routing techniques in direct networks, Computer, vol.26, issue.2, 1993. ,
DOI : 10.1109/2.191995
Are virtual channels the bottleneck of priority-aware wormhole-switched noc-based manycores, Proceedings RTNS, 2013, 2013. ,
A low cost networkon-chip with guaranteed service well suited to the GALS approach, Proceedings NanoNet'06, 2006. ,
The CyCab: a car-like robot navigating autonomously and safely among pedestrians, Robotics and Autonomous Systems, vol.50, issue.1, 2005. ,
DOI : 10.1016/j.robot.2004.10.002
URL : https://hal.archives-ouvertes.fr/inria-00182049
Integrated worst-case execution time estimation of multicore applications, Proceedings WCET'13, 2013. ,
URL : https://hal.archives-ouvertes.fr/hal-00909330
Using genetic algorithms to map hard realtime on noc-based systems, Proceedings ReCoSoC, 2012. ,
Schedulability analysis and task mapping for real-time on-chip communication, Real-Time Systems, vol.6, issue.2, pp.360-385, 2010. ,
DOI : 10.1007/s11241-010-9108-3
A light-weight statically scheduled network-on-chip, NORCHIP 2012, 2012. ,
DOI : 10.1109/NORCHP.2012.6403129
Investigation of the Tilera processor for real time hazard detection and avoidance on the Altair Lunar Lander, 2010 IEEE Aerospace Conference, 2010. ,
DOI : 10.1109/AERO.2010.5447023
Embedded systems: Many cores — Many problems, 7th IEEE International Symposium on Industrial Embedded Systems (SIES'12), 2012. ,
DOI : 10.1109/SIES.2012.6356583
Multiprocessor scheduling of processes with release times, deadlines, precedence, and exclusion relations, IEEE Transactions on Software Engineering, vol.19, issue.2, pp.139-154, 1993. ,
DOI : 10.1109/32.214831
Virtual channels vs. multiple physical networks, Proceedings of the 47th Design Automation Conference on, DAC '10, 2010. ,
DOI : 10.1145/1837274.1837315
Exploiting just-enough parallelism when mapping streaming applications in hard real-time systems, Proceedings of the 50th Annual Design Automation Conference on, DAC '13, 2013. ,
DOI : 10.1145/2463209.2488944