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Chapitre D'ouvrage Année : 2014

Substrate Technologies for Silicon‐Integrated RF and mm‐Wave Passive Devices

Résumé

This chapter mainly focuses on two different silicon (Si)‐based substrates: high‐resistivity Si substrate, including HR‐Si, high‐resistivity silicon‐on‐insulator (HR‐SOI) and trap‐rich HR‐Si, and porous Si substrate. A full comparison between the two is presented by integrating similar coplanar waveguide transmission lines (CPW TLines) on both of them and measuring their properties under similar conditions. A thick porous Si layer locally formed on the Si wafer can provide an effective RF shielding from the Si substrate for the integration of RF passive devices. The chapter discusses the fabrication and general properties of porous Si. The characteristics of different RF devices, including CPW TLines, inductors and antennas on porous Si are analyzed, demonstrating the effectiveness of porous Si as a local low loss RF substrate on Si.
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Dates et versions

hal-01059634 , version 1 (01-09-2014)

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Androula G. Nassiopoulou, Panagiotis Sarafis, Jean-Pierre Raskin, Hanza Issa, Philippe Ferrari. Substrate Technologies for Silicon‐Integrated RF and mm‐Wave Passive Devices. F. Balestra. Beyond CMOS Nanodevices 1, Wiley-ISTE, pp.373-418, 2014, Nanoscience and Nanotechnology Series, 978-1-84821-654-9, 978-1-11898-477-2. ⟨10.1002/9781118984772.ch13⟩. ⟨hal-01059634⟩
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