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Efficient Multilevel Interconnect Topology for Cluster-based Mesh FPGA Architecture

Abstract : This paper presents an improved cluster-based Mesh architecture. This architecture has a depopulated intracluster interconnect, and presents a new hierarchical topology for the switch box which unifies a downward and an upward unidirectional networks. Experimental results of 20 MCNC benchmarks show that density is improved and interconnect area requirement is reduced by 42% compared to the cluster-based VPR architecture.
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Contributor : Roselyne Chotin <>
Submitted on : Thursday, June 11, 2015 - 11:40:15 AM
Last modification on : Friday, January 8, 2021 - 5:32:07 PM
Long-term archiving on: : Tuesday, April 25, 2017 - 6:47:02 AM


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Emna Amouri, Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Zied Marrakchi. Efficient Multilevel Interconnect Topology for Cluster-based Mesh FPGA Architecture. ReConFig 2013 - International Conference on Reconfigurable Computing and FPGAs, Dec 2013, Cancun, Mexico. pp.1-6, ⟨10.1109/ReConFig.2013.6732282⟩. ⟨hal-00987368v2⟩



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