Physical Design Exploration of 3D Tree-based FPGA Architecture

Vinod Pangracious (1) , Emna Amouri (1) , Habib Mehrez (1) , Zied Marrakchi (2)

1 CIAN - Circuits Intégrés Numériques et Analogiques
2 Flexras Technologies

An innovative 3D physical design exploration methodology for Tree-based FPGA architecture is presented in this paper. In a Tree-based FPGA architecture, the interconnects are arranged in a multidimensional network with the logic unites and switch blocks placed at different levels, using a Butterfly-Fat Tree network topology. A 3D physical design exploration methodology leverage on Through Silicon Via (TSVs) using a horizontal break-point to distribute the Tree-based interconnect netwrok into multiple stacked active silicon layers proposed in this paper.

Mots clés: 3D Design; Tree-based FPGA

Domaines: Electronique

Vinod Pangracious, Emna Amouri, Habib Mehrez, Zied Marrakchi. Physical Design Exploration of 3D Tree-based FPGA Architecture. GLSVLSI'13 - The 23rd ACM international conference on Great lakes symposium on VLSI, May 2013, Paris, France. pp.335-336, ⟨10.1145/2483028.2483130⟩. ⟨hal-00873292⟩