Statistical Static Timing Analysis of Conditional Asynchronous Circuits Using Model-Based Simulation

E. Yahya (1, 2) , Laurent Fesquet (1) , Y. Ismail (2) , Marc Renaudin (3)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés
2 Higher Institute of Technology, Banha University
3 Tiempo SAS [Montbonnot Saint Martin]

Asynchronous designs are usually composed of conditional circuits. The analysis of these circuits is complex especially when delay variability is considered. In this paper, we design and implement a model-based Statistical Static Timing Analysis "SSTA" framework that is able to analyze conditional asynchronous circuits in efficient time. First, the paper introduces how the conditional circuits can be modeled; and then it shows how this model can be used to realize the SSTA analysis.

Mots clés: asynchronous circuits

Domaines: Micro et nanotechnologies/Microélectronique

E. Yahya, Laurent Fesquet, Y. Ismail, Marc Renaudin. Statistical Static Timing Analysis of Conditional Asynchronous Circuits Using Model-Based Simulation. 19th International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2013, Santa Monica, United States. pp.67-74. ⟨hal-00842226⟩