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Conference papers
Fully Integrated Doherty Power Amplifier Electromagnetically Optimized in CMOS 65nm with Constant PAE in Backoff
Abstract : A fully integrated Doherty power amplifier at 2.535 GHz is presented in 65 nm CMOS technology with constant PAE over a 8.75dB backoff. Electromagnetic models of each layout path were included in the optimization to dimension circuit components regarding parasitics of an accurate model. The method increased the PAE level in 6% through a constant 8.75 dB backoff range and increased in 2 dB the output power. The amplifier has an output power of 24 dBm, the first PAE peak is 26% and the second one 27%. Both sub-amplifiers have a single-ended cascode topology and optimized input and output networks to reduce the number of inductances and to correctly balance active-loadpull effect. Comparisons were done between schematic, post-layout and electromagnetic simulation.
https://hal.archives-ouvertes.fr/hal-00842195
Contributor : Eric Kerhervé <>
Submitted on : Monday, July 8, 2013 - 10:34:29 AM
Last modification on : Monday, October 12, 2020 - 5:12:02 PM
Contributor : Eric Kerhervé <>
Submitted on : Monday, July 8, 2013 - 10:34:29 AM
Last modification on : Monday, October 12, 2020 - 5:12:02 PM