An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow

Abstract : Software defined radio (SDR) opens a new door to future Internet of Things with higher degree of designing flexibility in context of wireless system development. Prototyping a remote implementation of wireless protocols on a hardware over the web requires a highly versatile software radio platform along with laid-back designing tools. To this aim, an FPGA-based SDR scheme has been proposed combining Virtex-6 Perseus 6010 platform capabilities and a design flow based on High-Level Synthesis (HLS) tools. A full IEEE 802.15.4 (ZigBee) physical layer has been implemented on the proposed platform from a C-language dataflow specification. All the results have been analyzed to lead to a fair comparison between different design flows. Although the proposed SDR has some designing issues, it shows a noticeable designing potentiality to flexible prototyping of future wireless systems.
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https://hal.archives-ouvertes.fr/hal-00833554
Contributor : Matthieu Gautier <>
Submitted on : Thursday, June 13, 2013 - 9:09:43 AM
Last modification on : Wednesday, September 4, 2019 - 5:42:04 PM
Long-term archiving on: Saturday, September 14, 2013 - 4:10:46 AM

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  • HAL Id : hal-00833554, version 1

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Vaibhav Bhatnagar, Ganda Stephane Ouedraogo, Matthieu Gautier, Arnaud Carer, Olivier Sentieys. An FPGA Software Defined Radio Platform with a High-Level Synthesis Design Flow. IEEE International Vehicular Technology conference (VTC-Spring13), Jun 2013, Dresden, Germany. pp.12. ⟨hal-00833554⟩

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