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SiC Vertical JFET Pure Diode-Less Inverter Leg

Abstract : The aim of this paper is to investigate the ability of a vertical structure JFET to operate in an inverter leg without any internal or external diode. The JFET is characterized to show the reverse conduction capability while the gate-to-source voltage is lower than the threshold voltage. An inverter leg is tested at 540 V /5 A and 50 kHz. A specific test board is implemented to assess a safe operation over a period of time.
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Submitted on : Monday, June 3, 2013 - 11:00:43 AM
Last modification on : Tuesday, September 1, 2020 - 2:44:13 PM
Long-term archiving on: : Tuesday, April 4, 2017 - 3:05:21 PM


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Rémy Ouaida, Xavier Fonteneau, Fabien Dubois, Dominique Bergogne, Florent Morel, et al.. SiC Vertical JFET Pure Diode-Less Inverter Leg. APEC, Mar 2013, Long Beach, CA, United States. pp.512-517, ⟨10.1109/APEC.2013.6520258⟩. ⟨hal-00829343⟩



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