Design of embedded systems: formal models, validation, and synthesis, Proceedings of IEEE, p.85, 1997. ,
DOI : 10.1109/5.558710
URL : http://www.cs.sunysb.edu/~grosu/cse653/esd.pdf
Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors, Proceedings of the seventh international workshop on Hardware/software codesign , CODES '99, 1999. ,
DOI : 10.1145/301177.301489
URL : https://hal.archives-ouvertes.fr/hal-01800625
Optimized implementation of real-time image processing algorithms on field programmable gate arrays, ICSP '98. 1998 Fourth International Conference on Signal Processing (Cat. No.98TH8344), 1998. ,
DOI : 10.1109/ICOSP.1998.770803
URL : http://www-rocq.inria.fr/syndex/pub/icsp98/icsp98.ps.gz
Vissers A Methodology for architecture exploration of heterogeneous signal processing systems, Proc. 1999 IEEE Worshop on Signal Processing Systems (SiP'99) ,
DOI : 10.1109/sips.1999.822323
URL : http://isis.et.tudelft.nl/pub/english.cgi/d271583/JVSP-29:3.pdf
Nicolau SPARK, High- Level Synthesis Framework For Applying Parallelizing Compiler Transformations, 7th Intl. Conference on VLSI design, 2004. ,
DOI : 10.1109/icvd.2003.1183177
URL : http://mesl.ucsd.edu/spark/pubs/spark-system-vlsi03.pdf
Grape-II: a system-level prototyping environment for DSP applications, Computer, vol.28, issue.2, pp.35-43, 1995. ,
DOI : 10.1109/2.347998
A statechart based HW/SW Codesign system, Proceedings of the 7 Intl. Workshop on Hardware/Software Codesign (CODES/CASHE), pp.3-5, 1999. ,
DOI : 10.1145/301177.301520
Linking Codeisgn and Reuse in Embedded Systems Design, Proceeding of the 8 Intl Workshop on Hardware/Software Codesign (CODES/CASHE), pp.3-5, 2000. ,
DOI : 10.1109/hsc.2000.843714
URL : http://www.sigda.org/Archives/ProceedingArchives/Codes/Codes2000/papers/2000/codes00/htmfiles/SUN_SGI/../../pdffiles/05_2.pdf
Synchronous programing of reactive systems, 1993. ,
Introduction to VLSI systems . s.l, 1980. ,
From algorithm and architecture specifications to automatic generation of distributed real-time executives: a seamless flow of graphs transformations, First ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2003. MEMOCODE '03. Proceedings., 2003. ,
DOI : 10.1109/MEMCOD.2003.1210097
URL : https://hal.archives-ouvertes.fr/hal-01800622
Zemva Automatic Generation of VHDL code for SynDEx v6 software. Electro technical and Computer Science conference, 2001. ,