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Toeplitz Matrix Approach for Binary Field Multiplication Using Quadrinomials

Anwar Hasan 1 Ashkan Namin 1 Christophe Negre 2, 3
2 DALI - Digits, Architectures et Logiciels Informatiques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier, UPVD - Université de Perpignan Via Domitia
Abstract : In the recent past, subquadratic space complexity multipliers have been proposed for binary fields defined by irreducible trinomials and some specific pentanomials. For such multipliers, alternative irreducible polynomials can also be used, in particular, nearly all one polynomials (NAOPs) seem to be better than pentanomials. For improved efficiency, multiplication modulo an NAOP is performed via modulo a quadrinomial whose degree is one more than that of the original NAOP. In this paper, we present a Toeplitz matrix-vector product based approach for multiplication modulo a quadrinomial. We obtain a fully parallel multiplier with a subquadratic space complexity. The Toeplitz matrix-vector product based approach is also interesting in the design of sequential multipliers. We present two such multipliers that process a two-bit digit every clock cycle. FPGA implementations of the proposed sequential as well as fully parallel multipliers for the field size of 163 are also presented.
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Submitted on : Tuesday, April 16, 2013 - 10:13:55 AM
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Anwar Hasan, Ashkan Namin, Christophe Negre. Toeplitz Matrix Approach for Binary Field Multiplication Using Quadrinomials. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2012, 20 (3), pp.449-458. ⟨10.1109/TVLSI.2011.2106524⟩. ⟨hal-00813684⟩



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