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A Python-Based Analog Layout Generation Tool For Nanometer CMOS Technologies

Stephanie Youssef 1, * Damien Dupuis 1 Ramy Iskander 1 Marie-Minerve Louerat 1
* Corresponding author
1 CIAN - Circuits Intégrés Numériques et Analogiques
LIP6 - Laboratoire d'Informatique de Paris 6
Abstract : This paper presents a python based analog layout generation tool for nanometer CMOS technologies. To demon- strate the ease of use and extension of this tool, the paper presents how to automatically compute and plot stress effect parameters for two layout techniques of a differential pair device (interdigited and symmetric).
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Submitted on : Monday, November 12, 2012 - 5:01:57 PM
Last modification on : Friday, January 8, 2021 - 5:32:07 PM
Long-term archiving on: : Wednesday, February 13, 2013 - 3:42:07 AM


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  • HAL Id : hal-00749939, version 1


Stephanie Youssef, Damien Dupuis, Ramy Iskander, Marie-Minerve Louerat. A Python-Based Analog Layout Generation Tool For Nanometer CMOS Technologies. Colloque national du GDR SOC-SIP, Jun 2010, Cergy, France. pp.1-2. ⟨hal-00749939⟩



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