A Python-Based Layout-Aware Analog Design Methodology For Nanometric Technologies

Stephanie Youssef (1) , Farakh Javid (1) , Damien Dupuis (1) , Ramy Iskander (1) , Marie-Minerve Louërat (1)

1 CIAN - Circuits Intégrés Numériques et Analogiques

This paper presents a methodology for procedural layout-aware design for nanometric technologies. A Python-based layout generation tool generates different layout styles for the same basic analog building blocks. Moreover, layout dependent parasitic parameters such as stress effects are easily computed and compared for different layout styles. The procedural layout description is written using a Python API that ensures layout portability over different technologies. A main focus is on how the layout generation tool addresses both geometric and parasitic- aware electrical synthesis. This is made possible through an internal loop that links circularly both the sizing phase and the layout generation phase. The proposed design methodology assists the analog designer in exploring electrical and physical trade-offs. At the end, we present synthesis and characterization results that prove the effectiveness and speed of the proposed methodology.

Domaines: Micro et nanotechnologies/Microélectronique

Stephanie Youssef, Farakh Javid, Damien Dupuis, Ramy Iskander, Marie-Minerve Louërat. A Python-Based Layout-Aware Analog Design Methodology For Nanometric Technologies. IEEE 6th International Design and Test Workshop (IDT), Dec 2011, Beyrouth, Lebanon. pp.62-67. ⟨hal-00749906⟩