Saturation Current and On-Resistance Correlation during Repetitive Short Circuit Conditions on SiC JFETs Transistors

Mounira Bouarroudj-Berkani , Stéphane Lefebvre (1) , Zoubir Khatir (2)

1 SATIE - Systèmes et Applications des Technologies de l'Information et de l'Energie
2 IFSTTAR/LTN - Laboratoire des Technologies Nouvelles

This letter presents a correlation between the reduction of the saturation current level and increase of on-state resistance and the top-metal ageing of normally ON SiC junction gate field effecttransistors. For this study, ageing has been obtained using repetitive short-circuit operations. Among monitored parameters during ageing, on-state resistance and short-circuit current level are those, which have the strongest evolution. The top-metal degradation has been characterized via the on-state resistance measurement during ageing. In particular, we clearly show that the top-metal restructuration due to ageing leads to an additional voltage drop between gate and source terminals and results to a lower gate-source junction voltage.

Mots clés: SiC; on state resistance; saturation current; metalization degradation

Domaines: Energie électrique; Electronique

Mounira Bouarroudj-Berkani, Stéphane Lefebvre, Zoubir Khatir. Saturation Current and On-Resistance Correlation during Repetitive Short Circuit Conditions on SiC JFETs Transistors. IEEE Transactions on Power Electronics, 2013, 28 (2), pp.621 - 624. ⟨10.1109/TPEL.2012.2215629⟩. ⟨hal-00743649⟩