H. R. Andersen, Model checking and boolean graphs, Theoretical Computer Science, vol.126, issue.1, pp.3-30, 1994.
DOI : 10.1016/0304-3975(94)90266-6

J. Barnat, L. Brim, M. Ce?ka, and P. Ro?kai, DiVinE: Parallel Distributed Model Checker (tool paper), Proceedings of Parallel and Distributed Methods in Verification and High Performance Computational Systems Biology HiBi/PDMC 2010 (Twente, pp.4-7, 2010.

A. Belinfante, J. Feenstra, R. G. De-vries, J. Tretmans, N. Goga et al., Formal Test Automation: A Simple Experiment Kluwer Academic, Proceedings of the IFIP 12th International Workshop on Testing of Communicating Systems IWTCS'99, 1999.

D. Bergamini, N. Descoubes, C. Joubert, and R. Mateescu, BISIMULATOR: A Modular Tool for On-the-Fly Equivalence Checking, Proceedings of the 11th International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'2005, pp.581-585, 2005.
DOI : 10.1007/978-3-540-31980-1_42

URL : https://hal.archives-ouvertes.fr/hal-00685325

B. Berthomieu, J. Bodeveix, P. Farail, M. Filali, H. Garavel et al., FI- ACRE: An Intermediate Language for Model Verification in the TOPCASED Environment SIA (the French Society of Automobile Engineers, Proceedings of the 4th European Congress on Embedded Real-Time Software ERTS'08 AAAF (the French Society of Aeronautic and Aerospace), and SEE (the French Society for Electricity, Electronics, and Information & Communication Technologies), 2008.

S. Blom and S. Orzan, Distributed state space minimization . Software Tools for Technology Transfer, pp.280-291, 2005.
DOI : 10.1016/s1571-0661(04)80812-0

URL : http://doi.org/10.1016/s1571-0661(04)80812-0

S. Blom, J. Van-de-pol, and M. Weber, LTSmin: Distributed and Symbolic Reachability, Proceedings of the 22nd International conference on Computer Aided Verification CAV 2010, pp.354-359
DOI : 10.1007/978-3-642-14295-6_31

A. Bouajjani, J. Fernandez, S. Graf, C. Rodríguez, and J. Sifakis, Safety for branching time semantics, Proceedings of 18th ICALP, 1991.
DOI : 10.1007/3-540-54233-7_126

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.24.1049

A. Bouali, A. Ressouche, V. Roy, and R. De-simone, The Fc2Tools set: a Toolset for the Verification of Concurrent Systems, Proceedings of the 8th Conference on Computer-Aided Verification, 1996.

F. Boyer, O. Gruber, and G. Salaün, Specifying and Verifying the SYNERGY Reconfiguration Protocol with LOTOS??NT and CADP, Proceedings of the 17th International Symposium on Formal Methods FM'2011, pp.103-117, 2011.
DOI : 10.1016/S0167-6423(02)00094-1

URL : https://hal.archives-ouvertes.fr/hal-00648909

M. Bozga, J. Fernandez, L. Ghirvu, S. Graf, J. Krimm et al., If: An Intermediate Representation and Validation Environment for Timed Asynchronous Systems, Proceedings of World Congress on Formal Methods in the Development of Computing Systems FM'99, 1999.
DOI : 10.1007/3-540-48119-2_19

URL : https://hal.archives-ouvertes.fr/hal-00369430

G. Chehaibar, H. Garavel, L. Mounier, N. Tawbi, and F. Zulian, Specification and Verification of the Power- Scale Bus Arbitration Protocol: An Industrial Experiment with LOTOS, Proceedings of the Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols, and Protocol Specification, Testing, and Verification FORTE/PSTV'96, pp.435-450, 1996.

G. Chehaibar, M. Zidouni, and R. Mateescu, Modeling Multiprocessor Cache Protocol Impact on MPI Performance, 2009 International Conference on Advanced Information Networking and Applications Workshops, 2009.
DOI : 10.1109/WAINA.2009.117

URL : https://hal.archives-ouvertes.fr/inria-00381674

K. H. Cheung, Compositional Analysis of Complex Distributed Systems, 1998.

S. C. Cheung and J. Kramer, Enhancing Compositional Reachability Analysis with Context Constraints, Proceedings of the 1st ACM SIGSOFT International Symposium on the Foundations of Software Engineering, pp.115-125, 1993.
DOI : 10.1145/256428.167071

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.41.6843

S. C. Cheung and J. Kramer, Compositional Reachability Analysis of Finite-State Distributed Systems with User-Specified Constraints, Proceedings of the 3rd ACM SIGSOFT International Symposium on the Foundations of Software Engineering, pp.140-150, 1995.

S. C. Cheung and J. Kramer, Context constraints for compositional reachability analysis, ACM Transactions on Software Engineering and Methodology, vol.5, issue.4, pp.334-377, 1996.
DOI : 10.1145/235321.235323

E. Clarke, E. A. Emerson, and A. P. Sistla, Automatic verification of finite-state concurrent systems using temporal logic specifications, 10th Annual Symposium on Principles of Programming Languages, 1983.
DOI : 10.1145/5397.5399

E. M. Clarke, E. A. Emerson, and A. P. Sistla, Automatic verification of finite-state concurrent systems using temporal logic specifications, ACM Transactions on Programming Languages and Systems, vol.8, issue.2, pp.244-263, 1986.
DOI : 10.1145/5397.5399

R. Cleaveland, T. Li, and S. Sims, The Concurrency Workbench of the New Century (Version 1.2) User's manual, 2000.

R. Cleaveland, J. Parrow, and B. Steffen, The concurrency workbench, Proceedings of the 1st Workshop on Automatic Verification Methods for Finite State Systems, pp.24-37, 1989.
DOI : 10.1007/3-540-52148-8_3

M. A. Cornejo, H. Garavel, R. Mateescu, and N. De-palma, Specification and Verification of a Dynamic Reconfiguration Protocol for Agent-based Applications, Proceedings of the 3rd IFIP WG 6.1 International Working Conference on Distributed Applications and Interoperable Systems DAIS'2001, pp.229-242, 2001.
DOI : 10.1007/0-306-47005-5_20

URL : https://hal.archives-ouvertes.fr/inria-00072397

N. Coste, H. Garavel, H. Hermanns, F. Lang, R. Mateescu et al., Ten Years of Performance Evaluation for Concurrent Systems Using CADP, Proceedings of the 4th International Symposium on Leveraging Applications of Formal Methods Part II, pp.128-142, 2010.
DOI : 10.1007/978-3-642-16561-0_18

URL : https://hal.archives-ouvertes.fr/inria-00532914

N. Coste, H. Hermanns, E. Lantreibecq, and W. Serwe, Towards Performance Prediction of Compositional Models in Industrial GALS Designs, Proceedings of the 21th International Conference on Computer Aided Verification CAV'2009, pp.204-218
DOI : 10.1007/978-3-642-02658-4_18

URL : https://hal.archives-ouvertes.fr/inria-00381657

P. Crouzen and F. Lang, Smart Reduction, Proceedings of Fundamental Approaches to Software Engineering FASE'2011, pp.111-126
DOI : 10.1007/978-3-642-19811-3_9

URL : https://hal.archives-ouvertes.fr/inria-00572535

D. D. Deavours and W. H. Sanders, An efficient well-specified check, Proceedings 8th International Workshop on Petri Nets and Performance Models (Cat. No.PR00331), pp.124-133, 1999.
DOI : 10.1109/PNPM.1999.796559

M. B. Dwyer, G. S. Avrunin, and J. C. Corbett, Patterns in Property Specifications for Finite-State Verification, Proceedings of the 21st International Conference on Software Engineering ICSE'99, 1999.

E. A. Emerson and C. Lei, Efficient Model Checking in Fragments of the Propositional Mu-Calculus, Proceedings of the 1st International Symposium on Logic in Computer Science LICS'86, pp.267-278, 1986.

J. Fernandez, ALDEBARAN : un système de vérification par réduction de processus communicants

J. Fernandez, H. Garavel, A. Kerbrat, R. Mateescu, L. Mounier et al., CADP a protocol validation and verification toolbox, Proceedings of the 8th Conference on Computer-Aided Verification, p.437
DOI : 10.1007/3-540-61474-5_97

J. Fernandez, H. Garavel, L. Mounier, A. Rasse, C. Rodríguez et al., A Toolbox for the Verification of LOTOS Programs, Proceedings of the 14th International Conference on Software Engineering ICSE'14, pp.246-259, 1992.

J. Fernandez and L. Mounier, ???On the fly??? verification of behavioural equivalences and preorders, Proceedings of the 3rd Workshop on Computer-Aided Verification, pp.181-191, 1991.
DOI : 10.1007/3-540-55179-4_18

J. Fernandez, J. Richier, and J. Voiron, Verification of Protocol Specifications using the CESAR System, Proceedings of the 5th IFIP International Workshop on Protocol Specification, Testing and Verification, pp.71-90, 1985.

M. J. Fischer and R. E. Ladner, Propositional dynamic logic of regular programs, Journal of Computer and System Sciences, vol.18, issue.2, pp.194-211, 1979.
DOI : 10.1016/0022-0000(79)90046-1

H. Garavel, Compilation et vérification de programmes LOTOS, Thèse de Doctorat, 1989.

H. Garavel, Compilation of LOTOS Abstract Data Types, Proceedings of the 2nd International Conference on Formal Description Techniques FORTE'89, pp.147-162, 1989.

H. Garavel, On the Introduction of Gate Typing in E- LOTOS. Rapport SPECTRE 94-3, VERIMAG, Grenoble, Feb, 1994.

H. Garavel, . Open, and . Caesar, OPEN/C??SAR: An open software architecture for verification, simulation, and testing, Proceedings of the First International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'98, pp.68-84, 1998.
DOI : 10.1007/BFb0054165

H. Garavel, Défense et illustration des algèbres de processus In Actes de l'Ecole d'´ eté Temps Réel ETR, 2003.

H. Garavel, Reflections on the Future of Concurrency Theory in General and Process Calculi in Particular, Proceedings of the LIX Colloquium on Emerging Trends in Concurrency Theory November 13?15, pp.149-164, 2006.
DOI : 10.1016/j.entcs.2008.04.009

URL : https://hal.archives-ouvertes.fr/inria-00191141

H. Garavel, C. Helmstetter, O. Ponsini, and W. Serwe, Verification of an industrial SystemC/TLM model using LOTOS and CADP, 2009 7th IEEE/ACM International Conference on Formal Methods and Models for Co-Design, 2009.
DOI : 10.1109/MEMCOD.2009.5185377

URL : https://hal.archives-ouvertes.fr/inria-00408283

H. Garavel and H. Hermanns, On Combining Functional Verification and Performance Evaluation Using CADP, Proceedings of the 11th International Symposium of Formal Methods Europe FME, pp.410-429, 2002.
DOI : 10.1007/3-540-45614-7_23

URL : https://hal.archives-ouvertes.fr/inria-00072096

H. Garavel and F. Lang, SVL: A Scripting Language for Compositional Verification, Proceedings of the 21st IFIP WG 6.1 International Conference on Formal Techniques for Networked and Distributed Systems FORTE'2001, pp.377-392
DOI : 10.1007/0-306-47003-9_24

URL : https://hal.archives-ouvertes.fr/inria-00072396

H. Garavel, F. Lang, and R. Mateescu, An Overview of CADP European Association for Software Science and Technology (EASST) Newsletter, pp.13-24, 2001.

H. Garavel, F. Lang, R. Mateescu, and W. Serwe, CADP??2006: A Toolbox for the Construction and Analysis of Distributed Processes, Proceedings of the 19th International Conference on Computer Aided Verification CAV, pp.158-163, 2007.
DOI : 10.1007/978-3-540-73368-3_18

URL : https://hal.archives-ouvertes.fr/inria-00189021

H. Garavel, F. Lang, R. Mateescu, and W. Serwe, CADP 2010: A Toolbox for the Construction and Analysis of Distributed Processes, Proceedings of the 17th International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'2011, pp.372-387, 2011.
DOI : 10.1007/BFb0054166

URL : https://hal.archives-ouvertes.fr/inria-00583776

H. Garavel, R. Mateescu, and . Seq, OPEN: A Tool for Efficient Trace-Based Verification, Proceedings of the 11th International SPIN Workshop on Model Checking of Software SPIN, pp.150-155, 2004.

H. Garavel, R. Mateescu, D. Bergamini, A. Curic, N. Descoubes et al., DISTRIBUTOR and BCG_MERGE: Tools for Distributed Explicit State Space Generation, Proceedings of the 12th International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'2006, pp.445-449, 2006.
DOI : 10.1007/3-540-44612-5_34

H. Garavel, R. Mateescu, and I. Smarandache, Parallel state space construction for model-checking, Proceedings of the 8th International SPIN Workshop on Model Checking of Software SPIN, pp.217-234, 2001.
DOI : 10.1007/3-540-45139-0_14

URL : https://hal.archives-ouvertes.fr/inria-00072247

H. Garavel, G. Salaün, and W. Serwe, On the semantics of communicating hardware processes and their translation into LOTOS for the verification of asynchronous circuits with CADP, Science of Computer Programming, vol.74, issue.3, pp.100-127, 2009.
DOI : 10.1016/j.scico.2008.09.011

URL : https://hal.archives-ouvertes.fr/inria-00381642

H. Garavel and W. Serwe, State space reduction for process algebra specifications, Theoretical Computer Science, vol.351, issue.2, pp.131-145, 2006.
DOI : 10.1016/j.tcs.2005.09.064

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.158.7148

H. Garavel and J. Sifakis, Compilation and Verification of LOTOS Specifications, Proceedings of the 10th International Symposium on Protocol Specification, Testing and Verification, pp.379-394, 1990.

H. Garavel and M. Sighireanu, Towards a Second Generation of Formal Description Techniques ? Rationale for the Design of E-LOTOS, Proceedings of the 3rd International Workshop on Formal Methods for Industrial Critical Systems FMICS'98, pp.187-230, 1998.

H. Garavel and M. Sighireanu, A Graphical Parallel Composition Operator for Process Algebras, Proceedings of the Joint International Conference on Formal Description Techniques for Distributed Systems and Communication Protocols, and Protocol Specification, Testing, and Verification FORTE/PSTV'99, pp.185-202, 1999.
DOI : 10.1007/978-0-387-35578-8_11

H. Garavel and D. Thivolle, Verification of GALS Systems by Combining Synchronous Languages and Process Calculi, Model Checking Software, Proceedings of the 16th International SPIN Workshop on Model Checking of Software SPIN'2009, pp.241-260, 2009.
DOI : 10.1007/978-3-540-27813-9_47

URL : https://hal.archives-ouvertes.fr/inria-00388819

H. Garavel, P. Turlier, and . Caesar, ADT : un compilateur pour les types abstraits algébriques du langage LOTOS, Actes du Colloque Francophone pour l'Ingénierie des Protocoles CFIP'93, 1993.

H. Garavel, C. Viho, and M. Zendri, System Design of a CC-NUMA Multiprocessor Architecture using Formal Specification, Model-Checking, Co-Simulation, and Test Generation, Springer International Journal on Software Tools for Technology Transfer (STTT), vol.3, issue.3, pp.314-331, 2001.
URL : https://hal.archives-ouvertes.fr/inria-00072597

D. Giannakopoulou, Model Checking for Concurrent Software Architectures, 1999.

S. Graf, J. Richier, C. Rodríguez, and J. Voiron, What are the limits of model checking methods for the verification of real life protocols?, Proceedings of the 1st Workshop on Automatic Verification Methods for Finite State Systems, pp.275-285
DOI : 10.1007/3-540-52148-8_23

S. Graf and B. Steffen, Compositional minimization of finite state systems, Proceedings of the 2nd Workshop on Computer-Aided Verification, pp.186-196, 1990.
DOI : 10.1007/BFb0023732

S. Graf, B. Steffen, and G. Lüttgen, Compositional minimisation of finite state systems using interface specifications, Formal Aspects of Computing, vol.17, issue.5, pp.607-616, 1996.
DOI : 10.1007/BF01211911

J. Groote and F. Vaandrager, An efficient algorithm for branching bisimulation and stuttering equivalence, Proceedings of the 17th ICALP (Warwick), pp.626-638, 1990.
DOI : 10.1007/BFb0032063

J. F. Groote and A. Ponse, The Syntax and Semantics of µCRL, Algebra of Communicating Processes'94, Workshops in Computing Series, pp.26-62, 1995.

J. F. Groote and T. A. Willemse, Parameterised boolean equation systems, Theoretical Computer Science, vol.343, issue.3, pp.332-369, 2005.
DOI : 10.1016/j.tcs.2005.06.016

C. Helmstetter and . Tlm, OPEN: a SystemC/TLM Front- End for the CADP Verification Toolbox. Workshop on Simulation Based Development of Certified Embedded Systems SBDCES'09 (Awaji Island, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00429070

C. Helmstetter and O. Ponsini, A Comparison of Two SystemC/TLM Semantics for Formal Verification, 2008 6th ACM/IEEE International Conference on Formal Methods and Models for Co-Design, pp.59-68, 2008.
DOI : 10.1109/MEMCOD.2008.4547687

URL : https://hal.archives-ouvertes.fr/inria-00275456

H. Hermanns, Interactive Markov Chains and the Quest for Quantified Quality, volume 2428 of Lecture Notes in Computer Science, 2002.

H. Hermanns and C. Joubert, A Set of Performance and Dependability Analysis Components for CADP, Proceedings of the 9th International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'2003, pp.425-430
DOI : 10.1007/3-540-36577-X_30

H. Hermanns and M. Siegle, Bisimulation Algorithms for Stochastic Process Algebras and Their BDD-Based Implementation, Proceedings of the 5th International AMAST Workshop ARTS'99, pp.244-265, 1999.
DOI : 10.1007/3-540-48778-6_15

C. A. Hoare, Communicating sequential processes, Communications of the ACM, vol.21, issue.8, pp.666-677, 1978.
DOI : 10.1145/359576.359585

G. J. Holzmann, Design and Validation of Computer Protocols. Software Series, 1991.

G. J. Holzmann, The model checker SPIN, IEEE Transactions on Software Engineering, vol.23, issue.5, 2003.
DOI : 10.1109/32.588521

I. Iec, LOTOS ? A Formal Description Technique Based on the Temporal Ordering of Observational Behaviour, International Organization for Standardization ? Information Processing Systems ? Open Systems Interconnection, 1989.

I. Iec, Enhancements to LOTOS (E-LOTOS) International Standard 15437, International Organization for Standardization ? Information Technology, 2001.

P. C. Kanellakis and S. A. Smolka, CCS expressions, finite state processes, and three problems of equivalence, Information and Computation, vol.86, issue.1, pp.43-68, 1990.
DOI : 10.1016/0890-5401(90)90025-D

J. G. Kemeny and J. L. Snell, Finite Markov Chains, 1976.

A. M. Khan, Connection of Compositional Verification Tools for Embedded Systems. Mémoire master 2 recherche, 2006.

J. Krimm and L. Mounier, Compositional state space generation from Lotos programs, Proceedings of TACAS'97 Tools and Algorithms for the Construction and Analysis of Systems, 1997.
DOI : 10.1007/BFb0035392

F. Lang, Compositional Verification Using SVL Scripts, Proceedings of the 8th International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'2002, pp.465-469, 2002.
DOI : 10.1007/3-540-46002-0_33

F. Lang and . Exp, Exp.Open 2.0: A Flexible Tool Integrating Partial Order, Compositional, and On-The-Fly Verification Methods, Proceedings of the 5th International Conference on Integrated Formal Methods IFM'2005, pp.70-88, 2005.
DOI : 10.1007/11589976_6

URL : https://hal.archives-ouvertes.fr/inria-00070339

F. Lang, G. Salaün, R. Hérilier, J. Kramer, and J. Magee, Translating FSP into LOTOS and networks of automata, Formal Aspects of Computing, vol.1, issue.2, pp.681-711, 2010.
DOI : 10.1007/s00165-009-0133-8

URL : https://hal.archives-ouvertes.fr/hal-00533808

E. Lantreibecq and W. Serwe, Model Checking and Co-simulation of a Dynamic Task Dispatcher Circuit Using CADP, Proceedings of the 16th International Workshop on Formal Methods for Industrial Critical Systems FMICS 2011, pp.180-195, 2011.
DOI : 10.1007/978-3-642-24431-5_14

URL : https://hal.archives-ouvertes.fr/hal-00642029

X. Liu and S. A. Smolka, Simple linear-time algorithms for minimal fixed points, Proceedings of the 25th International Colloquium on Automata, Languages , and Programming ICALP'98, pp.53-66, 1998.
DOI : 10.1007/BFb0055040

Y. Liu, J. Sun, and J. S. Dong, Developing Model Checkers Using PAT, Proceedings of the 8th International Symposium on Automated Technology for Verification and Analysis ATVA 2010. 89. A. Mader. Verification of Modal Properties Using Boolean Equation Systems. VERSAL 8, pp.371-377, 1997.
DOI : 10.1007/978-3-642-15643-4_30

J. Magee and J. Kramer, Concurrency: State Models and Java Programs, 2006.

J. Malhotra, S. A. Smolka, A. Giacalone, and R. Shapiro, Winston: A Tool for Hierarchical Design and Simulation of Concurrent Systems, Proceedings of the BCS-FACS Workshop on Specification and Verification of Concurrent Systems, pp.140-152, 1988.
DOI : 10.1007/978-1-4471-3534-0_7

R. Mateescu, Efficient Diagnostic Generation for Boolean Equation Systems, 93. R. Mateescu Proceedings of 6th International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS Proceedings of the 9th International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'2003, pp.251-265, 1998.
DOI : 10.1007/3-540-46419-0_18

URL : https://hal.archives-ouvertes.fr/inria-00072795

R. Mateescu, . Caesar, and . Solve, CAESAR_SOLVE: A generic library for on-the-fly resolution of alternation-free Boolean equation systems, International Journal on Software Tools for Technology Transfer, vol.8, issue.1, pp.37-56, 2006.
DOI : 10.1007/s10009-005-0194-9

URL : https://hal.archives-ouvertes.fr/inria-00084628

R. Mateescu and H. Garavel, XTL: A Meta-Language and Tool for Temporal Logic Model-Checking, Proceedings of the International Workshop on Software Tools for Technology Transfer STTT'98, pp.33-42, 1998.

R. Mateescu and E. Oudot, Improved On-the-Fly Equivalence Checking Using Boolean Equation Systems, Proceedings of the 15th International SPIN Workshop on Model Checking of Software SPIN, pp.196-213, 2008.
DOI : 10.1007/978-3-540-85114-1_15

URL : https://hal.archives-ouvertes.fr/inria-00347627

R. Mateescu and G. Salaün, Translating Pi-Calculus into LOTOS NT, Proceedings of the 8th International Conference on Integrated Formal Methods IFM'2010, pp.229-244, 2010.
DOI : 10.1007/s10009-003-0136-3

URL : https://hal.archives-ouvertes.fr/inria-00524586

R. Mateescu and W. Serwe, Model checking and performance evaluation with CADP illustrated on shared-memory mutual exclusion protocols, Science of Computer Programming, vol.78, issue.7, 2012.
DOI : 10.1016/j.scico.2012.01.003

URL : https://hal.archives-ouvertes.fr/hal-00671321

R. Mateescu and M. Sighireanu, Efficient on-the-fly model-checking for regular alternation-free mu-calculus, Science of Computer Programming, vol.46, issue.3, pp.255-281, 2003.
DOI : 10.1016/S0167-6423(02)00094-1

URL : https://hal.archives-ouvertes.fr/inria-00072755

R. Mateescu and D. Thivolle, A Model Checking Language for Concurrent Value-Passing Systems, Proceedings of the 15th International Symposium on Formal Methods FM'08, pp.148-164
DOI : 10.1007/978-3-540-68237-0_12

URL : https://hal.archives-ouvertes.fr/inria-00315312

J. M. Mellor-crummey and M. L. Scott, Algorithms for scalable synchronization on shared-memory multiprocessors, ACM Transactions on Computer Systems, vol.9, issue.1, pp.21-65, 1991.
DOI : 10.1145/103727.103729

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.106.3994

G. J. Milne, CIRCAL and the representation of communication, concurrency, and time, ACM Transactions on Programming Languages and Systems, vol.7, issue.2, pp.270-298, 1985.
DOI : 10.1145/3318.3322

R. Milner, Communication and Concurrency, 1989.

R. D. Nicola and F. W. Vaandrager, Action versus state based logics for transition systems, Lecture Notes in Computer Science, vol.469, pp.407-419
DOI : 10.1007/3-540-53479-2_17

C. Pecheur, Specification and Verification of the CO4 Distributed Knowledge System Using LOTOS, Proceedings of the 12th IEEE International Conference on Automated Software Engineering ASE-97, 1997.
URL : https://hal.archives-ouvertes.fr/inria-00073430

C. Pecheur, Advanced modelling and verification techniques applied to a cluster file system, 14th IEEE International Conference on Automated Software Engineering, 1999.
DOI : 10.1109/ASE.1999.802152

URL : https://hal.archives-ouvertes.fr/inria-00073273

O. Ponsini, C. Fédèle, and E. Kounalis, Rewriting of imperative programs into logical equations, Science of Computer Programming, vol.56, issue.3, pp.363-401, 2005.
DOI : 10.1016/j.scico.2004.10.001

O. Ponsini and W. Serwe, A Schedulerless Semantics of TLM Models Written in SystemC Via Translation into LOTOS, Proceedings of the 15th International Symposium on Formal Methods FM'08, pp.278-293, 1982.
DOI : 10.1007/978-3-540-68237-0_20

URL : https://hal.archives-ouvertes.fr/inria-00259944

A. W. Roscoe, The theory and practice of concurrency, 1998.

K. K. Sabnani, A. M. Lapone, and M. U. Uyar, An algorithmic procedure for checking safety properties of protocols, IEEE Transactions on Communications, vol.37, issue.9, pp.940-948, 1989.
DOI : 10.1109/26.35374

G. Salaün, X. Etchevers, N. D. Palma, F. Boyer, and T. Coupaye, Verification of a Self-configuration Protocol for Distributed Applications in the Cloud, Proceedings of the 27th Symposium On Applied Computing SAC'12, 2012.

S. Schewe, Solving parity games in big steps, Proceedings of the 27th International Conference on Software Technology and Theoretical Computer Science FSTTCS'07, pp.449-460, 2007.
DOI : 10.1016/j.jcss.2016.10.002

P. Stevens and C. Stirling, Practical model-checking using games, Proceedings of the First International Conference on Tools and Algorithms for the Construction and Analysis of Systems TACAS'98, pp.85-101, 1998.
DOI : 10.1007/BFb0054166

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.39.5200

R. Streett, Propositional Dynamic Logic of looping and converse, Proceedings of the thirteenth annual ACM symposium on Theory of computing , STOC '81, pp.121-141, 1982.
DOI : 10.1145/800076.802492

K. C. Tai and V. Koppol, Hierarchy-Based Incremental Reachability Analysis of Communication Protocols, Proceedings of the IEEE International Conference on Network Protocols, pp.318-325, 1993.

K. C. Tai and V. Koppol, An Incremental Approach to Reachability Analysis of Distributed Programs, Proceedings of the 7th International Workshop on Software Specification and Design, pp.141-150, 1993.

D. Thivolle, Langages modernes pour la vérification des systèmes asynchrones, Thèse de Doctorat) and Universitatea Politehnica din Bucuresti, 2011.

F. Tronel, F. Lang, and H. Garavel, Compositional Verification Using CADP of the ScalAgent Deployment Protocol for Software Components, Proceedings of the 6th IFIP International Conference on Formal Methods for Open Object-based Distributed Systems FMOODS'2003, pp.244-260, 2003.
DOI : 10.1109/26.35374

URL : https://hal.archives-ouvertes.fr/inria-00071572

A. Valmari, Compositional state space generation, Proceedings of Advances in Petri Nets, pp.427-457
DOI : 10.1007/3-540-56689-9_54

R. J. Van-glabbeek and W. P. Weijland, Branching- Time and Abstraction in Bisimulation Semantics (extended abstract). CS R8911, Centrum voor Wiskunde en Informatica, Also in proc. IFIP 11th World Computer Congress, 1989.

C. West, General Technique for Communications Protocol Validation, IBM Journal of Research and Development, vol.22, issue.4, pp.393-404, 1978.
DOI : 10.1147/rd.224.0393

P. Wolper, A Translation from Full Branching Time Temporal Logic to One Letter Propositional Dynamic Logic with Looping. Unpublished manuscript, 1982.

W. J. Yeh, Controlling State Explosion in Reachability Analysis, 1993.

W. J. Yeh and M. Young, Compositional reachability analysis using process algebra, Proceedings of the symposium on Testing, analysis, and verification , TAV4, pp.49-59, 1991.
DOI : 10.1145/120807.120812

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.36.3453

S. Yovine, KRONOS: a??verification tool for real-time systems, International Journal on Software Tools for Technology Transfer, vol.1, issue.1-2, pp.123-133, 1997.
DOI : 10.1007/s100090050009