Batching, Scheduling, Disjunctive graph, Local search, Simulated Annealing, Wafer fabrication

Claude Yugma (1) , Stephane Dauzere-Peres (2) , Christian Artigues (3) , Alexandre Derreumaux (4) , Olivier Sibille (5)

1 CMPGC
2 CMP Georges Charpak
3 LAAS - Laboratoire d'analyse et d'architecture des systèmes
4 CMP Georges Charpak
5 Zone industrielle d'ATMEL

This paper proposes an efficient heuristic algorithm for solving a complex batching and scheduling problem in a diffusion area of a semiconductor plant. Diffusion is frequently bottleneck in the plant and also one of the most complex areas in terms of number of machines, constraints to satisfy and the large number of lots to manage. The purpose of this study is to investigate an approach to group lots in batches and to schedule these batches on machines. The problem is modeled and solved using a disjunctive graph representation. A constructive algorithm is proposed and improvement procedures based on iterative sampling and Simulated Annealing are developed. Computational experiments, carried out on actual industrial problem instances, show the ability of the iterative sampling algorithms to significantly improve the initial solution, and that Simulated Annealing enhances the results. Furthermore, our algorithm compares favorably to an algorithm of the literature on a simplified version of our problem. The constructive algorithm has been embedded in a software and is currently being used in a semiconductor plant.

Mots clés: Physical Sciences

Domaines: Sciences de l'ingénieur [physics]

Claude Yugma, Stephane Dauzere-Peres, Christian Artigues, Alexandre Derreumaux, Olivier Sibille. Batching, Scheduling, Disjunctive graph, Local search, Simulated Annealing, Wafer fabrication. International Journal of Production Research, 2011, ⟨10.1080/00207543.2011.575090⟩. ⟨hal-00714553⟩