Energy and Computing Ressource Aware Feedback Control Strategies for H.264 Video Decoding
Résumé
Embedded devices using highly integrated chips must cope with conflicting constraints, while executing computationally demanding applications under limited energy storage. Automatic control and feedback loops appear to be an e ective solution to simultaneously accommodate for performance uncertainties due to the tiny scale gates variability, varying and poorly predictable computing demands and limited energy storage constraints. This report presents the practical example of an embedded video decoder controlled by several cascaded feedback loops to carry out the trade-o between decoding quality and energy consumption, exploiting the frequency and voltage scaling capabilities of the chip. The inner loop controls the Dynamic Voltage and Frequency Scaling (DVFS) through a fast predictive control strategy to adapt the computing speed of the chip to the demands of the video flow decoder. The outer loop is fed back with measures coming from the current frame decoding execution, and computes the scheduling set-points needed by the inner loop to process the next frame decoding. The feedback loops have been implemented on a standard PC and some experimental results are provided. It is shown that a noticeable reduction of the energy consumption can be achieved through a very small execution overhead while preserving a requested decoding quality, and that the robustness of feedback loops accommodates for the uncertainty coming both from the silicon's variability and from the demanded computing burden.
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