High Current - High Speed Dynamic Bias Control System Applied to a 100W Wideband Push-Pull Amplifier

Ludovic Bacqué (1) , Philippe Bouysse (1) , W. Rebernak , C. Poumier , L. Lapierre , Grégoire Nanfack Nkondem (1) , Guillaume Neveux (1) , Denis Barataud (1) , Raymond Quéré (1)

1 C2S2

This paper presents a dynamic bias control system applied to a high power wideband amplifier. The amplifier used is based on a push-pull topology with LDMOS transistors and works in the 50-500 MHz frequency bandwidth. It delivers a nominal 100 W output power with 60% power-added efficiency (PAE) when it is fed with continuous signals. When it is driven by a 16QAM modulated signal, 6 dB input power back-off is necessary to keep an error vector measurement below 5%. This usual back-off technique results in lower PAE (43% in our case). By implementing the proposed bias control system, both 55% PAE and 5% EVM have been reached for 75 W average output power. The drain bias control circuit handles high currents and high voltages (7 A-28 V). The proposed implementation makes use of a class S modulator driven by a SigmaDelta modulator. Up to 1 Mbit/s envelope bit rate can be efficiently and accurately processed by using here dedicated circuits running at 20 MHz clock frequency.

Ludovic Bacqué, Philippe Bouysse, W. Rebernak, C. Poumier, L. Lapierre, et al.. High Current - High Speed Dynamic Bias Control System Applied to a 100W Wideband Push-Pull Amplifier. IEEE Transactions on Microwave Theory and Techniques, 2008, 57 (12 - Part 1), pp. 2798-2807. ⟨10.1109/TMTT.2008.2007079⟩. ⟨hal-00660580⟩