A Low-Power 2 GHz Discrete Time Weighting System Dedicated To Sampled Analog Signal Processing

Abstract : Multi-standard applications encounter several developments in the wireless systems. A single receiver is required for any standard of communication. Software Radio (SR) is an illustration of this concept. This paper presents a design methodology to ease the design of a flexible RF receiver based on an analog discrete time Fast Fourier Transform (FFT). A proposed architecture named SASP (Sampled Analog Signal Processor) targets the previously exposed concept for wireless constraints. The FFT algorithm brings an analog weighting unit which is the most power hungry part in such an analog discrete time processor.
Document type :
Conference papers
Complete list of metadatas

https://hal.archives-ouvertes.fr/hal-00642017
Contributor : Equipe Conception de Circuits <>
Submitted on : Thursday, November 17, 2011 - 10:12:24 AM
Last modification on : Wednesday, October 9, 2019 - 9:30:27 PM

Identifiers

  • HAL Id : hal-00642017, version 1

Citation

Yoann Abiven, Francois Rivet, Yann Deval, Dominique Dallet, Didier Belot, et al.. A Low-Power 2 GHz Discrete Time Weighting System Dedicated To Sampled Analog Signal Processing. ICECS, Dec 2011, BEYROUTH, Lebanon. pp.50-55. ⟨hal-00642017⟩

Share

Metrics

Record views

256