On chip interconnects for multiprocessor turbo decoding architectures

Maurizio Martina (1) , Guido Masera (1) , Hazem Moussa (2, 3) , Amer Baghdadi (4, 2)

1 Polito - Politecnico di Torino = Polytechnic of Turin
2 ELEC - Département Electronique
3 Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (UMR 3192)
4 Lab-STICC_TB_CACS_IAS

Mots clés: NOC; Turbo decoder; MPSoC; VLSI

Domaines: Electronique

Maurizio Martina, Guido Masera, Hazem Moussa, Amer Baghdadi. On chip interconnects for multiprocessor turbo decoding architectures. Microprocessors and Microsystems: Embedded Hardware Design , 2011, 35 (2), pp.167 - 181. ⟨10.1016/j.micpro.2010.08.004⟩. ⟨hal-00632760⟩