Latency-Sensitive High-Level Synthesis for Multiple Word-Length DSP Design

Bertrand Le Gal (1) , Emmanuel Casseau (2)

1 IMS - Laboratoire de l'intégration, du matériau au système
2 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources

Domaines: Micro et nanotechnologies/Microélectronique

Bertrand Le Gal, Emmanuel Casseau. Latency-Sensitive High-Level Synthesis for Multiple Word-Length DSP Design. EURASIP Journal on Advances in Signal Processing, 2011, 2011, pp.11. ⟨10.1155/2011/927670⟩. ⟨hal-00631012⟩