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Communication Dans Un Congrès Année : 2011

Formal Verification of C-element Circuits

Résumé

It is well known that the correct behavior of asynchronous circuits is not guaranteed when the inputs switch too slowly. The erroneous behavior is generally difficult to be spotted by simulation based methods. We applied formal methods to study the analog switching behavior of a full-buffer circuit composed of C-elements. We used our reach ability analysis tool COHO to compute all reachable states of two C-element designs and verified several analog properties. Based on these properties, we identified a sufficient condition under which the full-buffer circuit always supports the designed handshaking protocol. We also improved the COHO tool to automate the verification process, reduce error and improve performance.
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Dates et versions

hal-00624249 , version 1 (16-09-2011)

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Citer

C. Yan, Laurent Fesquet, F. Ouchet, Katell Morin-Allory. Formal Verification of C-element Circuits. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'11), Apr 2011, Ithaca (NY), United States. pp.55 - 64, ⟨10.1109/ASYNC.2011.14⟩. ⟨hal-00624249⟩

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