M. Abramowitz and I. Stegun, Handbook of Mathematical Functions: with Formulas, Graphs, and Mathematical Tables, 1965.

G. Baudoin, C. Berland, M. Villegas, and A. Diet, Influence of time and processing mismatches between phase and envelope signals in linearization systems using envelope elimination and restoration, application to Hiperlan2, IEEE MTT-S International Microwave Symposium Digest, 2003, pp.2149-2152, 2003.
DOI : 10.1109/MWSYM.2003.1210588

J. Bercher and C. Berland, Envelope/phase delays correction in an EER radio architecture, 2006 13th IEEE International Conference on Electronics, Circuits and Systems, pp.443-446, 2006.
DOI : 10.1109/ICECS.2006.379820
URL : https://hal.archives-ouvertes.fr/hal-00621953

J. Bercher, A. Diet, C. Berland, G. Baudoin, and M. Villegas, Monte-Carlo estimation of time mismatch effect in an OFDM EER architecture, Proceedings. 2004 IEEE Radio and Wireless Conference (IEEE Cat. No.04TH8746), pp.283-286, 2004.
DOI : 10.1109/RAWCON.2004.1389130

C. Candan, An Efficient Filtering Structure for Lagrange Interpolation, IEEE Signal Processing Letters, vol.14, issue.1, pp.17-19, 2007.
DOI : 10.1109/LSP.2006.881528

R. Crochiere and L. Rabiner, Optimum FIR digital filter implementations for decimation, interpolation, and narrow-band filtering, IEEE Transactions on Acoustics, Speech, and Signal Processing, vol.23, issue.5, pp.444-456, 1975.
DOI : 10.1109/TASSP.1975.1162719

A. Dempster and N. Murphy, Efficient interpolators and filter banks using multiplier blocks, IEEE Transactions on Signal Processing, vol.48, issue.1, pp.257-261, 2000.
DOI : 10.1109/78.815498

C. Farrow, A continuous variable digital delay element, Proc. IEEE Int. Symp. Circuits Systems, pp.2641-2645, 1988.

T. Hentschel, Sample Rate Conversion in Software Configurable Radios, 2002.

T. Hentschel and G. Fettweis, The Digital Front-End ? Bridge Between RF-and Baseband-Processing, Software Defined Radio Enabling Technologies, pp.151-198, 2002.

J. Jau and T. Horng, Linear interpolation scheme for compensation of path delay difference in an envelope elimination and restoration transmitter, Proceedings of Asia-Pacific Microwave Conference, pp.1072-1075, 2001.

H. Johansson and O. Gustafsson, Linear-phase FIR interpolation, decimation, and mth-band filters utilizing the farrow structure, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.52, issue.10, pp.2197-2207, 2005.
DOI : 10.1109/TCSI.2005.853264

H. Johansson and P. Lowenborg, On the design of adjustable fractional delay fir filters, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.50, issue.4, pp.164-169, 2003.
DOI : 10.1109/TCSII.2003.809712

L. Kahn, Single-Sideband Transmission by Envelope Elimination and Restoration, Proceedings of the IRE, vol.40, issue.7, pp.803-806, 1952.
DOI : 10.1109/JRPROC.1952.273844

T. Laakso, V. Valimaki, M. Karjalainen, and U. Laine, Splitting the unit delay [FIR/all pass filters design], IEEE Signal Processing Magazine, vol.13, issue.1, pp.30-60, 1996.
DOI : 10.1109/79.482137

M. Makundi, T. Laakso, and V. Valimaki, Efficient tunable IIR and allpass filter structures, Electronics Letters, vol.37, issue.6, pp.344-345, 2001.
DOI : 10.1049/el:20010276

J. Mártires, C. Borg, and T. Larsen, Differential delay equalization in a Kahn EER transmitter, 2006.

P. Morgan, Highly integrated transceiver enables highvolume production of GSM/EDGE handsets, pp.36-42, 2006.

G. Oetken, A new approach for the design of digital interpolating filters, IEEE Transactions on Acoustics, Speech, and Signal Processing, vol.27, issue.6, pp.637-643, 1979.
DOI : 10.1109/TASSP.1979.1163316

F. Raab, Idealized operation of the class e tuned power amplifier . Circuits and Systems, IEEE Transactions on, vol.24, pp.725-735, 1977.

W. Sander, S. Schell, and B. Sander, Polar modulator for multi-mode cell phones, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003., pp.439-445, 2003.
DOI : 10.1109/CICC.2003.1249436

K. Sarigeorgidis and J. Rabaey, Ultra Low Power CORDIC Processor for Wireless Communication Algorithms, The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology, vol.38, issue.2, pp.115-130, 2004.
DOI : 10.1023/B:VLSI.0000040424.11334.34

R. Staszewski, J. Wallberg, S. Rezeq, C. Hung, O. Eliezer et al., All-digital PLL and transmitter for mobile phones, IEEE Journal of Solid-State Circuits, vol.40, issue.12, pp.2469-2482, 2005.
DOI : 10.1109/JSSC.2005.857417

G. Strasser, B. Lindner, L. Maurer, G. Hueber, and A. Springer, On the Spectral Regrowth in Polar Transmitters, 2006 IEEE MTT-S International Microwave Symposium Digest, pp.781-784, 2006.
DOI : 10.1109/MWSYM.2006.249770

V. Valimaki, A new filter implementation strategy for Lagrange interpolation, Proceedings of ISCAS'95, International Symposium on Circuits and Systems, pp.361-364, 1995.
DOI : 10.1109/ISCAS.1995.521525

V. Valimaki and T. Laakso, Principles of fractional delay filters, 2000 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.00CH37100), 2000.
DOI : 10.1109/ICASSP.2000.860248

J. Vesma and T. Saramaki, Optimization and efficient implementation of FIR filters with adjustable fractional delay, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97, pp.2256-2259, 1997.
DOI : 10.1109/ISCAS.1997.612771

E. Volkov, Numerical Methods. Mir Publisher Moscow 29 Interpolatory Function Theory, Whittaker JM, 1935.

S. Yli-kaakinen, Multiplication-Free Polynomial-Based FIR Filters with an Adjustable Fractional Delay, Circuits, Systems & Signal Processing, vol.25, issue.2, pp.265-294, 2006.
DOI : 10.1007/s00034-005-2507-3

J. Yli-kaakinen and T. Saramaki, An algorithm for the optimization of adjustable fractional-delay all-pass filters, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), pp.153-159, 2004.
DOI : 10.1109/ISCAS.2004.1328706

J. Yli-kaakinen and T. Saramaki, A Simplified Structure for FIR Filters with an Adjustable Fractional Delay, 2007 IEEE International Symposium on Circuits and Systems, pp.3439-3442, 2007.
DOI : 10.1109/ISCAS.2007.378366