HAL will be down for maintenance from Friday, June 10 at 4pm through Monday, June 13 at 9am. More information
Skip to Main content Skip to Navigation
Conference papers

Impact of the gate layout on the performance of RF power nLDMOSFETs integrated in a 0.13-µm CMOS technology

Document type :
Conference papers
Complete list of metadata

https://hal.archives-ouvertes.fr/hal-00575454
Contributor : Collection Iemn Connect in order to contact the contributor
Submitted on : Thursday, March 10, 2011 - 11:47:57 AM
Last modification on : Wednesday, March 23, 2022 - 3:50:24 PM

Identifiers

  • HAL Id : hal-00575454, version 1

Citation

D. Fournier, D. Ducatteau, E. Delos, M. Buczko, P. Scheer, et al.. Impact of the gate layout on the performance of RF power nLDMOSFETs integrated in a 0.13-µm CMOS technology. IEEE Topical Symposium on Power Amplifiers for Wireless Communications, PASymposium, 2009, San Diego, CA, United States. ⟨hal-00575454⟩

Share

Metrics

Record views

12