J. Andronick, B. Chetali, and O. Ly, Using Coq to verify Java Card Applet Isolation Properties, 16th International Conference on Theorem Proving in Higher Order Logics, 2003.
DOI : 10.1007/10930755_22
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.97.7655

F. Bouquet, F. Dadeau, and J. Groslambert, Checking JML Specifications with B Machines, ZB'05, pp.435-454, 2005.
DOI : 10.1007/11415787_25
URL : https://hal.archives-ouvertes.fr/inria-00329986

F. Bouquet, F. Dadeau, J. Groslambert, and J. Julliand, Safety Property Driven Test Generation from JML Specifications, FATES/RV'06, pp.225-239, 2006.
DOI : 10.1007/11940197_15
URL : https://hal.archives-ouvertes.fr/hal-00563280

F. Bouquet, F. Dadeau, and B. Legeard, Automated Boundary Test Generation from JML Specifications, FM'06, pp.428-443
DOI : 10.1007/11813040_29
URL : https://hal.archives-ouvertes.fr/inria-00329979

F. Bouquet, F. Dadeau, B. Legeard, and M. Utting, JML-Testing-Tools: A Symbolic Animator for JML Specifications Using CLP, TACAS'05 Tool session, pp.551-556, 2005.
DOI : 10.1007/978-3-540-31980-1_37
URL : https://hal.archives-ouvertes.fr/inria-00329995

C. Breunesse, N. Cataño, M. Huisman, and B. Jacobs, Formal methods for smart cards: an experience report, Science of Computer Programming, vol.55, issue.1-3, pp.1-353, 2005.
DOI : 10.1016/j.scico.2004.05.011

L. Burdy, Y. Cheon, D. Cok, M. Ernst, J. Kiniry et al., An overview of JML tools and applications, FMICS 03, pp.73-89, 2003.
DOI : 10.1007/s10009-004-0167-4

L. Burdy, A. Requet, and J. Lanet, Java Applet Correctness: A Developer-Oriented Approach, FM'03, number 2805 in LNCS, pp.422-439
DOI : 10.1007/978-3-540-45236-2_24
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.1.3304

R. M. Burstall, Program Proving as Hand Simulation with a Little Induction, Information Processing, pp.308-312, 1974.

A. Giorgetti and J. Groslambert, JAG: JML Annotation Generation for Verifying Temporal Properties, pp.373-376, 2006.
DOI : 10.1007/11693017_27
URL : https://hal.archives-ouvertes.fr/inria-00114316

G. J. Holzmann, The model checker SPIN, IEEE Transactions on Software Engineering, vol.23, issue.5, pp.279-295, 1997.
DOI : 10.1109/32.588521

A. Igarashi, B. Pierce, and P. Wadler, Featherweight Java: a minimal core calculus for Java and GJ, OOPSLA, pp.132-146, 1999.
DOI : 10.1145/503502.503505

B. Jacobs, C. Marché, and N. Rauch, Formal Verification of a Commercial Smart Card Applet with Multiple Tools, AMAST'04, number 3116 in LNCS, pp.21-22, 2004.
DOI : 10.1007/978-3-540-27815-3_21

O. Kouchnarenko, J. Groslambert, and J. Julliand, JML-based Verification of Liveness Properties on a Class, 2006.
URL : https://hal.archives-ouvertes.fr/hal-00561442

L. Lamport, Proving the Correctness of Multiprocess Programs, IEEE Transactions on Software Engineering, pp.125-143, 1977.
DOI : 10.1109/TSE.1977.229904

Y. Ledru, L. Du-bousquet, O. Maury, and P. Bontron, Filtering TOBIAS Combinatorial Test Suites, LNCS, vol.2984, pp.281-294, 2004.
DOI : 10.1007/978-3-540-24721-0_21

T. Lindholm and F. Yellin, The Java Virtual Machine Specification. The Java Series, 1997.

F. Logozzo, Class invariants as abstract interpretation of trace semantics, Computer Languages, Systems & Structures, vol.35, issue.2, 2005.
DOI : 10.1016/j.cl.2005.01.001

C. Marché, C. Paulin-mohring, and X. Urbain, The KRAKATOA tool for certificationof JAVA/JAVACARD programs annotated in JML, The Journal of Logic and Algebraic Programming, vol.58, issue.1-2, pp.89-106, 2004.
DOI : 10.1016/j.jlap.2003.07.006

B. Meyer, Object-Oriented Software Construction, 1997.

C. Oriat, Jartege: A Tool for Random Generation of Unit Tests for Java Classes, SOQUA 2005, pp.242-256, 2005.
DOI : 10.1007/11558569_18
URL : https://hal.archives-ouvertes.fr/hal-00003466

A. Pnueli, The temporal logic of programs, 18th Annual Symposium on Foundations of Computer Science (sfcs 1977), pp.46-57, 1977.
DOI : 10.1109/SFCS.1977.32

E. Robby, M. Rodríguez, J. Dwyer, and . Hatcliff, Checking Strong Specifications Using an Extensible Software Model Checking Framework, TACAS, pp.404-420, 2004.
DOI : 10.1007/978-3-540-24730-2_31
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.2.5369

K. Trentelman and M. Huisman, Extending JML Specifications with Temporal Logic, AMAST'02, number 2422 in LNCS, pp.334-348, 2002.
DOI : 10.1007/3-540-45719-4_23
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.16.6993

J. Van-den-berg, M. Huisman, B. Jacobs, and E. Poll, A Type-Theoretic Memory Model for Verification of Sequential Java Programs, WADT, pp.1-21, 1999.
DOI : 10.1007/978-3-540-44616-3_1