Modeling heterogeneous real-time systems in BIP, Proceedings of SEFM'06 ,
URL : https://hal.archives-ouvertes.fr/tel-00527491
Modeling synchronous systems in BIP, Proceedings of the seventh ACM international conference on Embedded software, EMSOFT '09, 2009. ,
DOI : 10.1145/1629335.1629347
URL : https://hal.archives-ouvertes.fr/hal-00722479
D-Finder: A Tool for Compositional Deadlock Detection and Verification, CAV '09: Proceedings of the 21st International Conference on Computer Aided Verification, 2009. ,
DOI : 10.1007/978-3-642-02658-4_45
URL : https://hal.archives-ouvertes.fr/hal-00722550
Semantic Translation of Simulink/Stateflow Models to Hybrid Automata Using Graph Transformations, International Workshop on Graph Transformation and Visual Modeling Techniques, 2004. ,
DOI : 10.1016/j.entcs.2004.02.055
Defining and translating a "safe" subset of simulink/stateflow into lustre, Proceedings of the fourth ACM international conference on Embedded software , EMSOFT '04, 2004. ,
DOI : 10.1145/1017753.1017795
Translating discretetime simulink to lustre, ACM Trans. Embed. Comput. Syst, 2005. ,
The synchronous dataflow programming language Lustre, Proceedings of IEEE, 1991. ,
Integration of simulink models with componentbased software models, Advances in Electrical and Computer Engineering, 2008. ,
Tool for Translating Simulink Models into Input Language of a Model Checker, ICFEM, 2006. ,
DOI : 10.1007/11901433_33