FPGA implementation of a real time multi-resolution edge detection video filter

Jérémie Hamon (1) , Vincent Fristot (2) , Robin Rolland (3)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés
2 GIPSA-AGPIG - GIPSA - Architecture, Géométrie, Perception, Images, Gestes
3 CIME - Centre Interuniversitaire de Micro-Electronique

This paper presents digital video filters labs for final year engineering students. The project deals with the implementation of Canny Deriche optimal edge detectors on a FPGA plateform. The target of these labs is to illustrate the design of integrated electronic systems and to introduce the concept of architecture/algorithm adequacy.

Mots clés: Engineering student labs; embedded filters; edge detectors; real-time video processing; FPGA; SoC

Domaines: Traitement du signal et de l'image [eess.SP]; Traitement du signal et de l'image [eess.SP]

Jérémie Hamon, Vincent Fristot, Robin Rolland. FPGA implementation of a real time multi-resolution edge detection video filter. EWME 2010 - 8th European Workshop on Microelectronics Education, May 2010, Darmstadt, Germany. http://www.mes.tu-darmstadt.de/conf/ewme2010/proceedings/proceedings.en.jsp. ⟨hal-00505122⟩