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Conference papers
A FPGA-prototype of a sliding-mode-controller IC for high-switching-frequency DC-DC converters
Abstract : A sliding mode control (SMC) algorithm dedicated to switching mode power supply (SMPS) is validated experimentally in a FPGA. A constant high switching frequency is obtained using an hybrid digital pulse width modulator (DPWM). The proposed SMC strategy cooperates with an off-chip ADC and the hybrid DPWM takes advantage of a digital clock manager (DCM) and a counter-comparator based DPWM with a Multi-stAage-noise-SHaping (MASH) ¿-¿ modulator. Experimental results verify closed-loop operation at switching frequency up to 4 MHz only limited by the discrete SMPS and its dynamic response less than 30 ¿s. Simulation results show that the complete digital controller chip in 0.35 ¿m CMOS process takes 0.72 mm2 of silicon area and the current consumption is roughly 100 ¿A/MHz for a dynamic response of 16 ¿s.
Keywords :
CMOS integrated circuits
sigma-delta modulation
DC-DC power convertors
comparators (circuits)
field programmable gate arrays
switched mode power supplies
variable structure systems
CMOS process
analog-digital converters
DC-DC converters
counter-comparator
¿-¿ modulator
digital control
switching mode power supply
sliding-mode-controller
size 0.35 mum
hybrid digital pulse width modulator
digital controller chip
digital clock manager
https://hal.archives-ouvertes.fr/hal-00476274
Contributor : Publications Ampère <>
Submitted on : Sunday, April 25, 2010 - 11:31:47 PM
Last modification on : Tuesday, September 1, 2020 - 2:44:17 PM
Contributor : Publications Ampère <>
Submitted on : Sunday, April 25, 2010 - 11:31:47 PM
Last modification on : Tuesday, September 1, 2020 - 2:44:17 PM