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Communication Dans Un Congrès Année : 2009

Digital Mapping of a Realistic Spike Timing Plasticity Model for Real-time Neural Simulations

Résumé

We develop the major steps taken to map a realistic spike timing-dependent plasticity (STDP) model into digital hardware architecture. Several types of mappings are implemented and tested on FPGA device. We compare their applicability to a real-time spiking neural network (SNN) simulator running in biological time-scale.
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Dates et versions

hal-00438274 , version 1 (03-12-2009)

Identifiants

  • HAL Id : hal-00438274 , version 1

Citer

B. Belhadj, J. Tomas, Y. Bornat, A. Daouzli, O. Malot, et al.. Digital Mapping of a Realistic Spike Timing Plasticity Model for Real-time Neural Simulations. Design of Circuits an Integrated Circuits Conference, Nov 2009, Zaragoza, Spain. pp.326-331. ⟨hal-00438274⟩
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