Skip to Main content Skip to Navigation
Conference papers

Scalable Compile-Time Scheduler for Multi-core Architectures

Abstract : As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing interest. This scheduling consists of statically distributing the tasks that constitute an application between available cores in a multi-core architecture in order to minimize the final latency. This problem has been proven to be NP-complete. A static scheduling algorithm is usually described as a monolithic process, and carries out two distinct functionalities: choosing the core to execute a specific function and evaluating the cost of the generated solutions. This paper describes a scheduling module which splits these functionalities into two sub-modules. This division produces an advanced scalability in terms of schedule quality and computation time, and also separates the heuristic complexity from the architecture model precision.
Complete list of metadata
Contributor : Jean François Nezan Connect in order to contact the contributor
Submitted on : Monday, November 2, 2009 - 4:41:22 PM
Last modification on : Wednesday, April 27, 2022 - 3:53:28 AM


  • HAL Id : hal-00429393, version 1


Maxime Pelcat, Pierrick Menuet, Jean François Nezan, Slaheddine Aridhi. Scalable Compile-Time Scheduler for Multi-core Architectures. Design, Automation and Test in Europe, DATE 2009, Apr 2009, Nice, France. pp. 1552-1555. ⟨hal-00429393⟩



Record views