E. A. Lee, The Problem with Threads, Computer, vol.39, issue.5, pp.33-42, 2006.
DOI : 10.1109/MC.2006.180

M. Pelcat, S. Aridhi, and J. F. Nezan, Optimization of automatically generated multi-core code for the LTE RACH-PD algorithm, 2008.
URL : https://hal.archives-ouvertes.fr/hal-00336477

J. Piat, S. S. Bhattacharyya, M. Pelcat, and M. Raulet, Multi-core code generation from interface based hierarchy, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00440479

M. Pelcat, P. Menuet, S. Aridhi, and J. Nezan, Scalable compile-time scheduler for multi-core architectures, 2009 Design, Automation & Test in Europe Conference & Exhibition, 2009.
DOI : 10.1109/DATE.2009.5090909
URL : https://hal.archives-ouvertes.fr/hal-00429393

T. Grandpierre and Y. Sorel, From algorithm and architecture specifications to automatic generation of distributed real-time executives: a seamless flow of graphs transformations, First ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2003. MEMOCODE '03. Proceedings., pp.123-132, 2003.
DOI : 10.1109/MEMCOD.2003.1210097

R. D. Blumofe, C. F. Joerg, B. C. Kuszmaul, C. E. Leiserson, K. H. Randall et al., Cilk: An efficient multithreaded runtime system, JOURNAL OF PARAL- LEL AND DISTRIBUTED COMPUTING, vol.37, pp.207-216, 1995.
DOI : 10.1006/jpdc.1996.0107
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.18.3175

E. A. Lee, Overview of the ptolemy project, 2001.

S. Bhattacharyya, G. Brebner, J. Eker, J. Janneck, M. Mattavelli et al., OpenDF -a dataflow toolset for reconfigurable hardware and multicore systems, 2008.
URL : https://hal.archives-ouvertes.fr/hal-00398827

G. Karsai, J. Sztipanovits, A. Ledeczi, and T. Bapty, Model-integrated development of embedded software, Proceedings of the IEEE, vol.91, issue.1, pp.145-164, 2003.
DOI : 10.1109/JPROC.2002.805824

P. Belanovic, An Open Tool Integration Environment for Efficient Design of Embedded Systems in Wireless Communications, 2006.

T. Grandpierre, C. Lavarenne, and Y. Sorel, Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors, Proceedings of the seventh international workshop on Hardware/software codesign , CODES '99, pp.74-78, 1999.
DOI : 10.1145/301177.301489
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.42.3154

C. Hsu, F. Keceli, M. Ko, S. Shahparnia, and S. S. Bhattacharyya, DIF: An Interchange Format for Dataflow-Based Design Tools, 2004.
DOI : 10.1007/978-3-540-27776-7_44

S. Stuijk, Predictable Mapping of Streaming Applications on Multiprocessors, 2007.

B. D. Theelen, A Performance Analysis Tool for Scenario-Aware Streaming Applications, Fourth International Conference on the Quantitative Evaluation of Systems (QEST 2007), pp.269-270, 2007.
DOI : 10.1109/QEST.2007.7

E. Lee and D. Messerschmitt, Available Online Synchronous data flow, Proceedings of the IEEE, vol.21, issue.75 9, pp.1235-1245, 1987.

J. W. Janneck, NL -a Network Language, 2007.

S. Schema and W. Group, IP-XACT v1.4: A specification for XML meta-data and tool interfaces The SPIRIT Consortium, Tech. Rep, 2008.

U. Brandes, M. Eiglsperger, I. Herman, M. Himsolt, and M. S. Marshall, GraphML Progress Report Structural Layer Proposal, Graph Drawing -9th International Symposium, GD 2001 Vienna Austria, pp.501-512, 2001.
DOI : 10.1007/3-540-45848-4_59

J. Piat, M. Raulet, M. Pelcat, P. Mu, and O. Déforges, An extensible framework for fast prototyping of multiprocessor dataflow applications, 2008 3rd International Design and Test Workshop, 2008.
DOI : 10.1109/IDT.2008.4802500
URL : https://hal.archives-ouvertes.fr/hal-00398830

J. W. Janneck and R. Esser, A predicate-based approach to defining visual language syntax, Proceedings IEEE Symposia on Human-Centric Computing Languages and Environments (Cat. No.01TH8587), pp.40-47, 2001.
DOI : 10.1109/HCC.2001.995232

J. L. Pino, S. S. Bhattacharyya, and E. A. Lee, A hierarchical multiprocessor scheduling framework for synchronous dataflow graphs, 1995.

S. Sriram and S. S. Bhattacharyya, Embedded Multiprocessors: Scheduling and Synchronization, CRC, 1 edition, 2000.
DOI : 10.1201/9781420048025

V. Sarkar, Partitioning and scheduling parallel programs for execution on multiprocessors, 1987.

O. Sinnen and L. A. Sousa, Communication contention in task scheduling, IEEE Transactions on Parallel and Distributed Systems, vol.16, issue.6, pp.503-515, 2005.
DOI : 10.1109/TPDS.2005.64

M. R. Garey and D. S. Johnson, Computers and Intractability ; A Guide to the Theory of NP-Completeness, 1990.

Y. Kwok, High-performance algorithms of compiletime scheduling of parallel processors, 1997.

F. Ghenassia, Transaction-Level Modeling with Systemc: Tlm Concepts and Applications for Embedded Systems, 2006.
DOI : 10.1007/b137175

B. Feng and R. Salman, TMS320TCI6482 EDMA3 performance, texas instrument technical document (SPRAAG8), 2006.

J. Jiang, T. Muharemovic, and P. Bertrand, Random access preamble detection for long term evolution wireless networks, Patent Nr

S. S. Bhattacharyya and E. A. Lee, Memory management for dataflow programming of multirate signal processing algorithms, IEEE Transactions on Signal Processing, vol.42, issue.5, pp.1190-1201, 1994.
DOI : 10.1109/78.295199