M. Akkar and C. Giraud, An Implementation of DES and AES, Secure against Some Attacks, Proceedings of CHES'01, pp.309-318, 2001.
DOI : 10.1007/3-540-44709-1_26

S. Chari, C. Jutla, J. Rao, and P. Rohatgi, Towards Sound Approaches to Counteract Power-Analysis Attacks, CRYPTO, pp.3-540, 1999.
DOI : 10.1007/3-540-48405-1_26
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.94.8951

J. D. Goli´cgoli´c and C. Tymen, Multiplicative Masking and Power Analysis of AES, CHES, pp.198-212

L. Goubin and J. Patarin, DES and differential power analysis, CHES, pp.158-172, 1999.

J. Blömer, J. Guajardo, and V. Krummel, Provably Secure Masking of AES, Proceedings of SAC'04, pp.69-83, 2004.
DOI : 10.1007/978-3-540-30564-4_5

T. Messerges, Using Second-Order Power Analysis to Attack DPA Resistant Software, CHES, pp.71-77, 2000.
DOI : 10.1007/3-540-44499-8_19

T. S. Messerges, Securing the AES Finalists Against Power Analysis Attacks, Fast Software Encryption'00, pp.150-164, 2000.
DOI : 10.1007/3-540-44706-7_11

E. Oswald, S. Mangard, N. Pramstaller, and V. Rijmen, A Side- Channel Analysis Resistant Description of the AES S-box Improved Higher-Order Side-Channel Attacks With FPGA Experiments, Proceedings of FSE'05 CHES, pp.413-423, 2005.

L. Sauvage, S. Guilley, J. Danger, Y. Mathieu, and M. Nassar, Successful Attack on an FPGA-based Automatically Placed and Routed WDDL+ Crypto Processor, DATE, track A4 (Secure embedded implementations), 2009.
URL : https://hal.archives-ouvertes.fr/hal-00339858

F. Standaert, B. Gierlichs, and I. Verbauwhede, Partition vs. Comparison Side-Channel Distinguishers: An Empirical Evaluation of Statistical Tests for Univariate Side-Channel Attacks against Two Unprotected CMOS Devices, ICISC, pp.253-267, 2008.
DOI : 10.1007/11802839_42

F. Standaert, G. Rouvroy, and J. Quisquater, FPGA Implementations of the DES and Triple-DES Masked Against Power Analysis Attacks, 2006 International Conference on Field Programmable Logic and Applications, 2006.
DOI : 10.1109/FPL.2006.311315

J. Waddle and D. Wagner, Towards Efficient Second-Order Power Analysis, CHES, pp.1-15, 2004.
DOI : 10.1007/978-3-540-28632-5_1