Design and simulation of a planar anode GTO thyristor on SiC

Pierre Brosselard (1, 2) , Dominique Planson (1, 2) , Sigo Scharnholz (3) , V. Zorngiebel (3) , Mihai Lazar (1, 2) , Christophe Raynaud (1, 2) , Jean-Pierre Chante (1, 2) , E. Spahn (3)

1 CEGELY - Centre de génie électrique de Lyon
2 INSA Lyon - Institut National des Sciences Appliquées de Lyon
3 ISL - Institut franco-allemand de recherches de Saint-Louis

4H-SiC asymmetrical gate turn-off (GTO) thyristors have been simulated using the finite element code MEDICI™. The goal of these numerical simulations is a performance analysis of GTO SiC-thyristors having a planar anode. One advantage over the conventional etched anode structure is the avoidance of lithography related problems appearing in the recessed gate groove. From a performance point of view the planar anode and gate geometries allow smaller distances and hence lower specific on-resistance as well as a higher dI/dt. After a detailed description of simulation tool, models used and their parameters, this paper focuses on the dV/dt sensitivity, on the blocking voltage attainable with JTE and on the influence of the geometry on the switching-on. Finally the results will be compared to recessed gate GTO thyristors on SiC

Domaines: Energie électrique

Pierre Brosselard, Dominique Planson, Sigo Scharnholz, V. Zorngiebel, Mihai Lazar, et al.. Design and simulation of a planar anode GTO thyristor on SiC. CAS (International Semiconductor Conference), Sep 2003, Sinaia, Romania. pp.222, ⟨10.1109/SMICND.2003.1252421⟩. ⟨hal-00410085⟩