HLS Design Flow for Multimode IP Generation Under Multiple Constraints

Abstract : In a mobile society, more and more devices need to continuously adapt to changing environments. Such mode switches can be smoothly done in software using a general purpose or digital signal processor though hardware components can cope with throughput and power constraints. In this paper we propose a methodology to implement multiple configuration (or mode) and multi-constraint systems into a single circuit using conventional hardware technologies. Results show the interest of the methodology.
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Conference papers
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https://hal.archives-ouvertes.fr/hal-00400051
Contributor : Bertrand Le Gal <>
Submitted on : Monday, June 29, 2009 - 4:17:49 PM
Last modification on : Tuesday, April 10, 2018 - 10:06:02 AM

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  • HAL Id : hal-00400051, version 1

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Bertrand Le Gal, Emmanuel Casseau, Lilian Bossuet, S. Khan. HLS Design Flow for Multimode IP Generation Under Multiple Constraints. IEEE International Conference on Electronics, Circuits and Systems, Dec 2007, Marrakech, Morocco. pp.000. ⟨hal-00400051⟩

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