Arrêt de service programmé du vendredi 10 juin 16h jusqu’au lundi 13 juin 9h. Pour en savoir plus
Accéder directement au contenu Accéder directement à la navigation
Communication dans un congrès

Synchronous Modeling and Validation of Priority Inheritance Schedulers

Abstract : Architecture Description Languages (ADLs) allow embedded systems to be described as assemblies of hardware and software components. It is attractive to use such a global modelling as a basis for early system analysis. However, in such descriptions, the applicative software is often abstracted away, and is supposed to be developed in some host programming language. This forbids to take the applicative software into account in such early validation. To overcome this limitation, a solution consists in translating the ADL description into an executable model, which can be simulated and validated together with the software. In a previous paper [1], we proposed such a translation of Aadl (Architecture Analysis & Design Language) specifications into an executable synchronous model. The present paper is a continuation of this work, and deals with expressing the behavior of complex scheduling policies managing shared resources. We provide a synchronous specification for two shared resource scheduling protocols: the well-known basic priority inheritance protocol (BIP), and the priority ceiling protocol (PCP). This results in an automated translation of Aadl models into a purely Boolean synchronous (Lustre) scheduler, that can be directly model-checked, possibly with the actual software.
Liste complète des métadonnées

Littérature citée [20 références]  Voir  Masquer  Télécharger
Contributeur : Nicolas Halbwachs Connectez-vous pour contacter le contributeur
Soumis le : vendredi 15 mai 2009 - 09:50:29
Dernière modification le : mardi 19 octobre 2021 - 13:48:09
Archivage à long terme le : : lundi 15 octobre 2012 - 10:26:55


Fichiers produits par l'(les) auteur(s)


  • HAL Id : hal-00384389, version 1



Erwan Jahier, Nicolas Halbwachs, Pascal Raymond. Synchronous Modeling and Validation of Priority Inheritance Schedulers. Fundamental Approaches to Software Engineering, Mar 2009, York, United Kingdom. pp.140-154. ⟨hal-00384389⟩



Consultations de la notice


Téléchargements de fichiers