High-Frequency Monolithic DC/DC Converter for System-on-Chip Power Management

V. Pinon , Bruno Allard (1, 2) , C. Garnier

1 AMPERE - Ampère
2 CEGELY - Centre de génie électrique de Lyon

System-on-chip requirements for energy management push both technology and design to their limits. The integration constraint is added to high performance needs in terms of power efficiency and reactivity. For this purpose, this paper verifies the applicability of the standard analog step-down SMPS architecture in very high frequencies. The presented results were measured on a test-chip realized in standard 0.13mum CMOS technology, switching in the 100MHz range, with a power efficiency up to 80% and a regulation bandwidth of 20MHz

Domaines: Energie électrique

V. Pinon, Bruno Allard, C. Garnier. High-Frequency Monolithic DC/DC Converter for System-on-Chip Power Management. ISPSD, 2006, Naples, Italy. pp.1 - 4, ⟨10.1109/ISPSD.2006.1666112⟩. ⟨hal-00369383⟩