Skip to Main content Skip to Navigation
Journal articles

Multisynchronous and Fully Asynchronous NoCs for GALS Architectures

Abstract : Networks on chips constitute a new design paradigm for communication infrastructures in large multiprocessor SoCs. NoCs can use the GALS technique to address the difficulty of distributing a synchronous clock signal on the entire chip area. This article describes two approaches to implementing a distributed NoC in a GALS environment.
Complete list of metadata
Contributor : Lucie Torella Connect in order to contact the contributor
Submitted on : Tuesday, March 10, 2009 - 3:48:23 PM
Last modification on : Sunday, June 26, 2022 - 9:54:51 AM




Abbas Sheibanyrad, Alain Greiner, Ivan Miro-Panades. Multisynchronous and Fully Asynchronous NoCs for GALS Architectures. IEEE Design & Test, IEEE, 2008, 25 (6), pp.572-580. ⟨10.1109/MDT.2008.167⟩. ⟨hal-00367212⟩



Record views