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Multisynchronous and Fully Asynchronous NoCs for GALS Architectures

Abstract : Networks on chips constitute a new design paradigm for communication infrastructures in large multiprocessor SoCs. NoCs can use the GALS technique to address the difficulty of distributing a synchronous clock signal on the entire chip area. This article describes two approaches to implementing a distributed NoC in a GALS environment.
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https://hal.archives-ouvertes.fr/hal-00367212
Contributor : Lucie Torella <>
Submitted on : Tuesday, March 10, 2009 - 3:48:23 PM
Last modification on : Friday, January 8, 2021 - 5:32:08 PM

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Abbas Sheibanyrad, Alain Greiner, Ivan Miro-Panades. Multisynchronous and Fully Asynchronous NoCs for GALS Architectures. IEEE Design & Test, IEEE, 2008, 25 (6), pp.572-580. ⟨10.1109/MDT.2008.167⟩. ⟨hal-00367212⟩

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