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Current reuse topology in UWB CMOS LNA

Abstract : Low power low voltage operation is found to be the bottleneck of future CMOS system implementations. To comply with these constrains, a current reuse configuration is here reported to design UWB Low Noise Amplifiers (LNA). A resistive feedback topology is first proposed performing an 11.5dB gain over a 2 to 9 GHz range. Consuming a 17mW under 1.4V, this circuit achieves a 4.45dB minimum Noise Figure (NFmin). Current reuse approach is then combined with LC ladder technique to cover the upper band of European UWB -i.e. 6 to 10GHz-. This second LNA provides a 12.2dB, 4.4dB NFmin, from 5.6 to 8.8GHz. Operating under 1.6V it solely consumes 5mW. Considering a 1.2V supply voltage case, the two circuits still exhibit a more than 9 and 11dB gain respectively. Implemented in a 0.13µm CMOS technology, silicon areas are 0.6mm² for resistive feedback amplifier, and 1mm² for LC ladder, with PADS
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Submitted on : Wednesday, February 11, 2009 - 11:38:30 AM
Last modification on : Wednesday, October 9, 2019 - 9:30:27 PM

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Thierry Taris, Yann Deval, Jean-Baptiste Begueret. Current reuse topology in UWB CMOS LNA. Analog Integrated Circuits and Signal Processing, Springer Verlag, 2009, pp.51-69. ⟨10.5772/8420⟩. ⟨hal-00360488⟩



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