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Conference papers
Design of Class-E Power VCO in 65nm CMOS Technology: Application to RF Transmitter Architecture
Abstract : This paper investigates the feasibility of designing a RF TX architecture based on a Power VCO, operating at 1.95 GHz for UMTS/WCDMA standard. The Power VCO uses 2.5 V supply voltage and is designed using 65nm CMOS technology from ST Microelectronics. The Power VCO is made up of an oscillating Power Amplifier (PA). In order to fulfil UMTS/W CDMA requirements, especially on output power with regards to efficiency to save battery life, the used PA is a two-stage Class E PA. The output 1 dB compression point (CP1) is 22 dBm and Power Added Efficiency (PAE) @CP1 is 55.1%. This PA is then included in a loop to realize oscillation condition. The Power VCO oscillates @ 1.95GHz, achieves an output power of 23.3dBm with 60.3% PAE
https://hal.archives-ouvertes.fr/hal-00207360
Contributor : Nathalie Deltimple <>
Submitted on : Thursday, January 17, 2008 - 12:24:23 PM
Last modification on : Monday, October 12, 2020 - 5:12:02 PM
Contributor : Nathalie Deltimple <>
Submitted on : Thursday, January 17, 2008 - 12:24:23 PM
Last modification on : Monday, October 12, 2020 - 5:12:02 PM