DEVELOPMENT OF A PROTOTYPE THERMAL MANAGEMENT SOLUTION FOR 3-D STACKED CHIP ELECTRONICS BY INTERLEAVED SOLID SPREADERS AND SYNTHETIC JETS - Archive ouverte HAL Accéder directement au contenu
Communication Dans Un Congrès Année : 2007

DEVELOPMENT OF A PROTOTYPE THERMAL MANAGEMENT SOLUTION FOR 3-D STACKED CHIP ELECTRONICS BY INTERLEAVED SOLID SPREADERS AND SYNTHETIC JETS

Résumé

A design for cooling 3D stacked chip electronics is proposed using solid heat spreaders of high thermal conductivity interleaved between the chip layers. The spreaders conduct heat to the base of an advanced synthetic jet cooled heat sink. A prior computational study [1] showed that for moderate power dissipations, 5 W in each 27 x 38 mm layer, a 250 µm thick copper heat spreader would conduct heat adequately. However, the mismatch in coefficient of thermal expansion between copper and silicon required large holes through the copper layer for electrical vias. The current study investigates the design of a thermal prototype for experimental testing. Each active layer will incorporate a thermal test die to simulate an FPGA and a smaller one to simulate a DRAM (Fig. 2). The spreader layer will be silicon with no via holes. The heat sink will contact only three of the stack sides to allow wirebond connections on the fourth side (Fig. 3). The effect of the power dissipated and the heat transfer coefficient applied to the peripheral surface are studied. In order to remove the heat from the edges of a multi-layer stack and transfer it to the ambient air, a novel active heat sink design has been implemented using a matrix of integrated synthetic jets. In previous synthetic jet heat sink designs, cooling air is entrained upstream of the heat sink and is driven along the length of the fins. In the new design, synthetic jets emanate from the base of the fins so that the induced jets and entrained (cooling) ambient air flow along the fin height. The velocity field of the active heat sink is mapped using particle image velocimetry (PIV). Thermal performance is characterized using a surrogate heater and embedded thermocouple sensors. The thermal performance of identical heat sinks cooled by the two synthetic jet approaches is compared. An improved third heat sink solution is introduced and compared to previous results
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Dates et versions

hal-00202553 , version 1 (07-01-2008)

Identifiants

  • HAL Id : hal-00202553 , version 1

Citer

D. Gerty, D. W. Gerlach, Y. K. Joshi, A. Glezer. DEVELOPMENT OF A PROTOTYPE THERMAL MANAGEMENT SOLUTION FOR 3-D STACKED CHIP ELECTRONICS BY INTERLEAVED SOLID SPREADERS AND SYNTHETIC JETS. THERMINIC 2007, Sep 2007, Budapest, Hungary. pp.156-161. ⟨hal-00202553⟩
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