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Communication Dans Un Congrès Année : 2007

A Heavy-Ion Tolerant Clock and Data Recovery Circuit for Satellite Embedded High-Speed Data Links

Résumé

A CDR circuit dedicated to satellite embedded high-speed data links is implemented in a 0.13 µm CMOS technology. Its design is based on an Injection-Locked Oscillator. Its SET sensitivity is evaluated thanks to heavy-ion irradiation.
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Dates et versions

hal-00182293 , version 1 (25-10-2007)

Identifiants

  • HAL Id : hal-00182293 , version 1

Citer

Herve Lapuyade, Olivier Mazouffre, Birama Goumballa, Yann Deval, Jean-Baptiste Begueret, et al.. A Heavy-Ion Tolerant Clock and Data Recovery Circuit for Satellite Embedded High-Speed Data Links. 44 Annual International Nuclear and Space Radiation Effects Conference, Jul 2007, Honolulu - Hawaii, United States. pp.317-321. ⟨hal-00182293⟩
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