A Heavy-Ion Tolerant Clock and Data Recovery Circuit for Satellite Embedded High-Speed Data Links

Abstract : A CDR circuit dedicated to satellite embedded high-speed data links is implemented in a 0.13 µm CMOS technology. Its design is based on an Injection-Locked Oscillator. Its SET sensitivity is evaluated thanks to heavy-ion irradiation.
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https://hal.archives-ouvertes.fr/hal-00182293
Contributor : Equipe Conception de Circuits <>
Submitted on : Thursday, October 25, 2007 - 2:07:41 PM
Last modification on : Wednesday, October 9, 2019 - 9:30:27 PM

Identifiers

  • HAL Id : hal-00182293, version 1

Citation

Herve Lapuyade, Olivier Mazouffre, Birama Goumballa, Yann Deval, Jean-Baptiste Begueret, et al.. A Heavy-Ion Tolerant Clock and Data Recovery Circuit for Satellite Embedded High-Speed Data Links. 44 Annual International Nuclear and Space Radiation Effects Conference, Jul 2007, Honolulu - Hawaii, United States. pp.317-321. ⟨hal-00182293⟩

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