A Heavy-Ion Tolerant Clock and Data Recovery Circuit for Satellite Embedded High-Speed Data Links

Abstract : A Clock and Data Recovery (CDR) circuit dedicated to satellite embedded high-speed data links is implemented in a 0.13 µm CMOS technology. Its radiation hardening is obtained thanks to an innovative architecture based on an Injection-Locked Oscillator (ILO) associated with a phase-alignment circuit. Its low Single-Event Transient (SET) sensitivity is shown thanks to heavy-ion and laser testing.
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https://hal.archives-ouvertes.fr/hal-00182248
Contributor : Equipe Conception de Circuits <>
Submitted on : Thursday, October 25, 2007 - 11:37:09 AM
Last modification on : Wednesday, October 9, 2019 - 9:30:27 PM

Identifiers

  • HAL Id : hal-00182248, version 1

Citation

Hervé Lapuyade, Olivier Mazouffre, Birama Goumballa, Michel Pignol, Florence Malou, et al.. A Heavy-Ion Tolerant Clock and Data Recovery Circuit for Satellite Embedded High-Speed Data Links. IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2007, 56 (6), pp.2080-2085. ⟨hal-00182248⟩

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