Efficient representation for formal verification of PLC programs

Abstract : This paper addresses scalability of model-checking using the NuSMV model-checker. To avoid or at least limit combinatory explosion, an efficient representation of PLC programs is proposed. This representation includes only the states that are meaningful for properties proof. A method to translate PLC programs developed in Structured Text into NuSMV models based on this representation is described and exemplified on several examples. The results, state space size and verification time, obtained with models constructed using this method are compared to those obtained with previously published methods so as to assess efficiency of the proposed representation.
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Contributeur : Vincent Gourcuff <>
Soumis le : vendredi 28 septembre 2007 - 10:41:28
Dernière modification le : jeudi 9 février 2017 - 15:55:33
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  • HAL Id : hal-00175431, version 1

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Vincent Gourcuff, Olivier de Smet, Jean-Marc Faure. Efficient representation for formal verification of PLC programs. 8th International Workshop On Discrete Event Systems (WODES'06), Jul 2006, Ann Arbor, United States. pp. 182-187. ⟨hal-00175431⟩

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