Sub-threshold channels at the edges of nanoscale triple-gate silicon transistors

H. Sellier (1, 2) , G. P. Lansbergen (2) , J. Caro (2) , N. Collaert (2) , I. Ferain (3) , M. Jurczak (3) , S. Biesemans (3) , S. Rogge (3)

1 NEEL - QuNES - Nano-Electronique Quantique et Spectroscopie
2 KI-NANO - Kavli Institute of Nanosciences [Delft]
3 IMEC - IMEC

We investigate by low-temperature transport experiments the sub-threshold behavior of triple-gate silicon field-effect transistors. These three-dimensional nano-scale devices consist of a lithographically defined silicon nanowire surrounded by a gate with an active region as small as a few tens of nanometers, down to 50x60x35 nm^3. Conductance versus gate voltage show Coulomb-blockade oscillations with a large charging energy due to the formation of a small potential well below the gate. According to dependencies on device geometry and thermionic current analysis, we conclude that sub-threshold channels, a few nanometers wide, appear at the nanowire edges, hence providing an experimental evidence for the corner-effect.

Domaines: Systèmes mésoscopiques et effet Hall quantique [cond-mat.mes-hall]

H. Sellier, G. P. Lansbergen, J. Caro, N. Collaert, I. Ferain, et al.. Sub-threshold channels at the edges of nanoscale triple-gate silicon transistors. Applied Physics Letters, 2007, 90 (7), pp.073502. ⟨10.1063/1.2476343⟩. ⟨hal-00135312⟩