Validation of Asynchronous Circuit Specifications Using IF/CADP

D. Borrione (1, 2) , M. Boubekeur (1) , L. Mounier (3) , Marc Renaudin (1) , A. Sirianni (1)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés
2 ENSIMAG - École nationale supérieure d'informatique et de mathématiques appliquées
3 VERIMAG - IMAG - VERIMAG

This work addresses the analysis and validation of modular CHP specifications for asynchronous circuits, using formalisms and tools coming from the field of distributed software. CHP specifications are translated into an intermediate format (IF) based on communicating extended finite state machines. They are then validated using the IF environment, which provides model checking and bi-simulation tools.

Mots clés: asynchronous; VLSI-SoC

Domaines: Micro et nanotechnologies/Microélectronique

D. Borrione, M. Boubekeur, L. Mounier, Marc Renaudin, A. Sirianni. Validation of Asynchronous Circuit Specifications Using IF/CADP. Manfred Glesner, Ricardo Reis, Leandro Indrusiak, Vincent Mooney and Hans Eveking. VLSI-SOC: From Systems to Chips, Springer, pp.85-100, 2006, Serie : IFIP International Federation for Information Processing, ⟨10.1007/0-387-33403-3⟩. ⟨hal-00107431⟩