Automatic Parametric Verification of Root Contention Protocol based on Abstract State Machines and First Order Timed Logic

Abstract : The paper presents a verification of the IEEE Root Contention Protocol as an illustration of a new and innovative approach for the verification of real-time distributed systems. Systems are modeled with basic Gurevich abstract state machines (ASMs), and requirements are expressed in a first order timed logic (FOTL). FOTL is undecidable, however the protocol we study is in a decidable class of practical interest. Advantages of this framework are twofold: on the one hand, a great expressive power which permits in particular an easy treatment of parameters, on the other hand the modeling task is simplified by an adequat choice of tools.
Type de document :
Communication dans un congrès
TACAS, 2004, France. Springer-Verlag, pp.372-387, 2004, LNCS 2988
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https://hal.archives-ouvertes.fr/hal-00094616
Contributeur : Tristan Crolard <>
Soumis le : jeudi 14 septembre 2006 - 17:01:14
Dernière modification le : jeudi 11 janvier 2018 - 06:19:28

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  • HAL Id : hal-00094616, version 1

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Danièle Beauquier, Tristan Crolard, Evguenia Prokofieva. Automatic Parametric Verification of Root Contention Protocol based on Abstract State Machines and First Order Timed Logic. TACAS, 2004, France. Springer-Verlag, pp.372-387, 2004, LNCS 2988. 〈hal-00094616〉

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