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Conference papers
Automatic Parametric Verification of Root Contention Protocol based on Abstract State Machines and First Order Timed Logic
Abstract : The paper presents a verification of the IEEE Root Contention Protocol as an illustration of a new and innovative approach for the verification of real-time distributed systems. Systems are modeled with basic Gurevich abstract state machines (ASMs), and requirements are expressed in a first order timed logic (FOTL). FOTL is undecidable, however the protocol we study is in a decidable class of practical interest. Advantages of this framework are twofold: on the one hand, a great expressive power which permits in particular an easy treatment of parameters, on the other hand the modeling task is simplified by an adequat choice of tools.
https://hal.archives-ouvertes.fr/hal-00094616
Contributor : Tristan Crolard <>
Submitted on : Thursday, September 14, 2006 - 5:01:14 PM
Last modification on : Thursday, January 23, 2020 - 3:48:01 PM
Contributor : Tristan Crolard <>
Submitted on : Thursday, September 14, 2006 - 5:01:14 PM
Last modification on : Thursday, January 23, 2020 - 3:48:01 PM
