Hardware for computing modular multiplication algorithm

A. Bernal (1) , A. Guyot (1)

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

This paper examines the characteristics of an alternative architecture for computing a modular multiplication based on Montgomery's algorithm, useful in performing RSA public key cryptosystems operations. An experimental 12*12 bits modular multiplier prototype has been designed with this architecture and fabricated by AMS using 0.6 mu m CMOS technology. The architecture, its operation and some simulation results are presented. The evaluation is provided according to the functionality. The active area size is 1.33*0.93 mm/sup 2/, containing about 4100 transistors.

Mots clés: modular-multiplication-algorithm-computing-hardware; modular-multiplication-architecture; Montgomery's-algorithm; RSA-public-key-cryptosystems-operations; modular-multiplier-prototype; CMOS-technology; simulation-; functionality-; active-area-size; 12-bit; 0.6-micron; 1.33-mm; 0.93-mm

Domaines: Micro et nanotechnologies/Microélectronique

A. Bernal, A. Guyot. Hardware for computing modular multiplication algorithm. ESSCIRC-'98.-Proceedings-of-the-24th-European-Solid-State-Circuits-Conference., 1998, The Hague, Netherlands. pp.444-7. ⟨hal-00014387⟩