Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors

Johann Laurent 1 Eric Senn 1 Nathalie Julien 1 Eric Martin 1
1 Lab-STICC_UBS_CACS_MOCS
Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
Abstract : A high-level consumption estimation methodology and its associated tool, SoftExplorer, are presented. The estimation methodology uses a functional modeling of the processor combined with a parametric model to allow the designer to estimate the power consumption when the embedded software is executed on the target. SoftExplorer uses as input the assembly code generated by the compiler; its efficiency is compared to SimplePower's approach. Results for different processors (TI C62, C67, C55 and ARM7) and for several DSP applications provide an average error less than 5%. The accuracy and the rapidness of the estimation allow using SoftExplorer for efficiently guiding the designer in choosing the more appropriate processor for his application.
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  • HAL Id : hal-00013979, version 1

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Johann Laurent, Eric Senn, Nathalie Julien, Eric Martin. Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors. DATE, 2004, Paris, France. pp 666. ⟨hal-00013979⟩

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