Multi-processor SoC design methodology using a concept of two-layer hardware-dependent software

S. Yoo (1) , W. Youssef (1) , A. Bouchhima (1) , A.A. Jerraya (1) , M. Diaz-Nava

1 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

In conventional multiprocessor SoC (MPSoC) design methods, we find two problems: lack of SW code portability and lack of early SW validation. The problems cause a long design cycle. To resolve them, we present a concept of two-layer hardware-dependent software (HdS). The presented HdS consists of hardware abstraction layer to abstract the sub-system architecture and SoC abstraction layer to abstract the global MPSoC architecture. During the exploration of global and sub-system architectures, the application programming interfaces of presented two-layer HdS allow to keep the SW independent from architectural change. The simulation models of two-layer HdS enable to validate the entire system including the SW and HW design early in the design steps. We show the effectiveness of the presented methodology in the MPSoC architecture exploration of an OpenDiVX encoder system design.

Mots clés: multiprocessor-SoC-design-methods; system-on-chip; two-layer-hardware-dependent-software; hardware-abstraction-layer; subsystem-architecture; SoC-abstraction-layer; programming-interfaces; software-design; hardware-design; encoder-system-design; digital-simulation

Domaines: Micro et nanotechnologies/Microélectronique

S. Yoo, W. Youssef, A. Bouchhima, A.A. Jerraya, M. Diaz-Nava. Multi-processor SoC design methodology using a concept of two-layer hardware-dependent software. 2004, pp.Vol.2, 1382-3, ⟨10.1109/DATE.2004.1269098⟩. ⟨hal-00008049⟩